arm64: dts: renesas: Add interrupt-names to CANFD nodes

The Renesas R-Car CAN-FD Controller on R-Car Gen3 and RZ/G2 SoCs has two
interrupts.  Add interrupt-names properties to all CAN-FD device nodes
to identify the individual interrupts, so we can make this property a
required property in the DT bindings.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/10eef1e20372af4a156b06df8e5124666ec7c6b6.1651512451.git.geert+renesas@glider.be

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index bdf23c1..e7d1777 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -1179,6 +1179,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
                                 <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index 156ccc5..f62d957 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -1052,6 +1052,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
                                 <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
index 9da3e73..b6aeb22 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
@@ -1009,6 +1009,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
                                 <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
index e20e3e1..8ec5909 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
@@ -1280,6 +1280,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
                                 <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index b0063f5..a297af2 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -1368,6 +1368,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A7795_CLK_CANFD>,
                               <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77960.dtsi b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
index ef1d860..4159c23 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77960.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77960.dtsi
@@ -1240,6 +1240,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A7796_CLK_CANFD>,
                               <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index aa666b1..3c744b7 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -1229,6 +1229,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A77961_CLK_CANFD>,
                               <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 02b1cbb..21a5e1c 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -1103,6 +1103,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A77965_CLK_CANFD>,
                               <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 1891b3b..2703ef3 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -557,6 +557,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A77970_CLK_CANFD>,
                                 <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index b56120f..8594be7 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -609,6 +609,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                                 <&cpg CPG_CORE R8A77980_CLK_CANFD>,
                                 <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 44d6f60..d330212 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -1052,6 +1052,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A77990_CLK_CANFD>,
                               <&can_clk>;

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 9c181e0..f040d03 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -557,6 +557,7 @@
                        reg = <0 0xe66c0000 0 0x8000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
                                   <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch_int", "g_int";
                        clocks = <&cpg CPG_MOD 914>,
                               <&cpg CPG_CORE R8A77995_CLK_CANFD>,
                               <&can_clk>;