Merge tag 'coresight-next-v5.18-v2' of git://git.kernel.org/pub/scm/linux/kernel...

Suzuki writes:

coresight: changes for v5.18

The coresight update for v5.18 includes
  - TRBE erratum workarounds for Arm Cortex-A510
  - Fixes for leaking root namespace PIDs into non-root namespace
    trace sessions
  - Miscellaneous fixes and cleanups

Updated tag to reflect missing committer s-o-b tags.

Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
* tag 'coresight-next-v5.18-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux:
  coresight: Drop unused 'none' enum value for each component
  coresight: etm3x: Don't trace PID for non-root PID namespace
  coresight: etm4x: Don't trace PID for non-root PID namespace
  coresight: etm4x: Don't use virtual contextID for non-root PID namespace
  coresight: etm4x: Add lock for reading virtual context ID comparator
  coresight: trbe: Move check for kernel page table isolation from EL0 to probe
  coresight: no-op refactor to make INSTP0 check more idiomatic
  hwtracing: coresight: Replace acpi_bus_get_device()
  coresight: syscfg: Fix memleak on registration failure in cscfg_create_device
  coresight: Fix TRCCONFIGR.QE sysfs interface
  coresight: trbe: Work around the trace data corruption
  coresight: trbe: Work around the invalid prohibited states
  coresight: trbe: Work around the ignored system register writes

diff --combined arch/arm64/Kconfig
index 09b885c,390f0b1..7c3081e
--- 1/arch/arm64/Kconfig
--- 2/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@@ -672,7 -672,6 +672,7 @@@ config ARM64_WORKAROUND_TRBE_OVERWRITE_
  
  config ARM64_ERRATUM_2051678
        bool "Cortex-A510: 2051678: disable Hardware Update of the page table dirty bit"
 +      default y
        help
          This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
          Affected Coretex-A510 might not respect the ordering rules for
@@@ -807,7 -806,7 +807,7 @@@ config ARM64_ERRATUM_222448
  
  config ARM64_ERRATUM_2064142
        bool "Cortex-A510: 2064142: workaround TRBE register writes while disabled"
-       depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
+       depends on CORESIGHT_TRBE
        default y
        help
          This option adds the workaround for ARM Cortex-A510 erratum 2064142.
@@@ -825,7 -824,7 +825,7 @@@
  
  config ARM64_ERRATUM_2038923
        bool "Cortex-A510: 2038923: workaround TRBE corruption with enable"
-       depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
+       depends on CORESIGHT_TRBE
        default y
        help
          This option adds the workaround for ARM Cortex-A510 erratum 2038923.
@@@ -848,7 -847,7 +848,7 @@@
  
  config ARM64_ERRATUM_1902691
        bool "Cortex-A510: 1902691: workaround TRBE trace corruption"
-       depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
+       depends on CORESIGHT_TRBE
        default y
        help
          This option adds the workaround for ARM Cortex-A510 erratum 1902691.