spi: rspi: Increase bit rate range for QSPI
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 19 Aug 2020 12:59:02 +0000 (14:59 +0200)
committerMark Brown <broonie@kernel.org>
Thu, 20 Aug 2020 21:38:15 +0000 (22:38 +0100)
Increase bit rate range for QSPI by extending the range of supported
dividers:
  1. QSPI supports a divider of 1, by setting SPBR to zero, increasing
     the upper limit from 48.75 to 97.5 MHz on R-Car Gen2,
  2. Make use of the Bit Rate Frequency Division Setting field in
     Command Registers, to decrease the lower limit from 191 to 24 kbps
     on R-Car Gen2.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200819125904.20938-6-geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-rspi.c

index ea3f268..38c0cd7 100644 (file)
@@ -334,14 +334,26 @@ static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size)
  */
 static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
 {
-       int spbr;
+       unsigned long clksrc;
+       int brdv = 0, spbr;
 
        /* Sets output mode, MOSI signal, and (optionally) loopback */
        rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
 
        /* Sets transfer bit rate */
-       spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->speed_hz);
-       rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
+       clksrc = clk_get_rate(rspi->clk);
+       if (rspi->speed_hz >= clksrc) {
+               spbr = 0;
+       } else {
+               spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz);
+               while (spbr > 255 && brdv < 3) {
+                       brdv++;
+                       spbr = DIV_ROUND_UP(spbr, 2);
+               }
+               spbr = clamp(spbr, 0, 255);
+       }
+       rspi_write8(rspi, spbr, RSPI_SPBR);
+       rspi->spcmd |= SPCMD_BRDV(brdv);
 
        /* Disable dummy transmission, set byte access */
        rspi_write8(rspi, 0, RSPI_SPDCR);