be2net: Use new F/W mailbox cmd to manipulate interrupts.
authorSomnath Kotur <somnath.kotur@emulex.com>
Thu, 14 Mar 2013 02:42:07 +0000 (02:42 +0000)
committerDavid S. Miller <davem@davemloft.net>
Fri, 15 Mar 2013 12:56:58 +0000 (08:56 -0400)
This is needed as the earlier method of manipulating this register via PCI
Config space is disallowed by certain Hypervisors.

Signed-off-by: Somnath Kotur <somnath.kotur@emulex.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/emulex/benet/be_cmds.c
drivers/net/ethernet/emulex/benet/be_cmds.h
drivers/net/ethernet/emulex/benet/be_main.c

index 6ed4639..9916364 100644 (file)
@@ -3202,6 +3202,31 @@ err:
        return status;
 }
 
+int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable)
+{
+       struct be_mcc_wrb *wrb;
+       struct be_cmd_req_intr_set *req;
+       int status;
+
+       if (mutex_lock_interruptible(&adapter->mbox_lock))
+               return -1;
+
+       wrb = wrb_from_mbox(adapter);
+
+       req = embedded_payload(wrb);
+
+       be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                              OPCODE_COMMON_SET_INTERRUPT_ENABLE, sizeof(*req),
+                              wrb, NULL);
+
+       req->intr_enabled = intr_enable;
+
+       status = be_mbox_notify_wait(adapter);
+
+       mutex_unlock(&adapter->mbox_lock);
+       return status;
+}
+
 int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload,
                        int wrb_payload_size, u16 *cmd_status, u16 *ext_status)
 {
index 6ef4575..f2af855 100644 (file)
@@ -188,6 +188,7 @@ struct be_mcc_mailbox {
 #define OPCODE_COMMON_GET_BEACON_STATE                 70
 #define OPCODE_COMMON_READ_TRANSRECV_DATA              73
 #define OPCODE_COMMON_GET_PORT_NAME                    77
+#define OPCODE_COMMON_SET_INTERRUPT_ENABLE             89
 #define OPCODE_COMMON_GET_PHY_DETAILS                  102
 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP          103
 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES   121
@@ -1791,6 +1792,12 @@ struct be_cmd_enable_disable_vf {
        u8 rsvd[3];
 };
 
+struct be_cmd_req_intr_set {
+       struct be_cmd_req_hdr hdr;
+       u8 intr_enabled;
+       u8 rsvd[3];
+};
+
 static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
 {
        return flags & adapter->cmd_privileges ? true : false;
@@ -1938,3 +1945,4 @@ extern int be_cmd_set_profile_config(struct be_adapter *adapter, u32 bps,
 extern int be_cmd_get_if_id(struct be_adapter *adapter,
                            struct be_vf_cfg *vf_cfg, int vf_num);
 extern int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);
+extern int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable);
index dae7172..c71b180 100644 (file)
@@ -153,17 +153,10 @@ static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
        return 0;
 }
 
-static void be_intr_set(struct be_adapter *adapter, bool enable)
+static void be_reg_intr_set(struct be_adapter *adapter, bool enable)
 {
        u32 reg, enabled;
 
-       /* On lancer interrupts can't be controlled via this register */
-       if (lancer_chip(adapter))
-               return;
-
-       if (adapter->eeh_error)
-               return;
-
        pci_read_config_dword(adapter->pdev, PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET,
                                &reg);
        enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
@@ -179,6 +172,22 @@ static void be_intr_set(struct be_adapter *adapter, bool enable)
                        PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET, reg);
 }
 
+static void be_intr_set(struct be_adapter *adapter, bool enable)
+{
+       int status = 0;
+
+       /* On lancer interrupts can't be controlled via this register */
+       if (lancer_chip(adapter))
+               return;
+
+       if (adapter->eeh_error)
+               return;
+
+       status = be_cmd_intr_set(adapter, enable);
+       if (status)
+               be_reg_intr_set(adapter, enable);
+}
+
 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
 {
        u32 val = 0;