drm/amdgpu: Wrap clflush_cache_range with x86 ifdef

To avoid compile errors on other platforms.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index cff0fd2..3836acc 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1883,8 +1883,15 @@ static ssize_t psp_usbc_pd_fw_sysfs_write(struct device *dev,
 
        memcpy_toio(cpu_addr, usbc_pd_fw->data, usbc_pd_fw->size);
 
-       /*TODO Remove once PSP starts snooping CPU cache */
+       /*
+        * x86 specific workaround.
+        * Without it the buffer is invisible in PSP.
+        *
+        * TODO Remove once PSP starts snooping CPU cache
+        */
+#ifdef CONFIG_X86
        clflush_cache_range(cpu_addr, (usbc_pd_fw->size & ~(L1_CACHE_BYTES - 1)));
+#endif
 
        mutex_lock(&adev->psp.mutex);
        ret = psp_load_usbc_pd_fw(&adev->psp, dma_addr);