PCI: dwc: Add L1 Substates context to ltssm_status of debugfs
authorShawn Lin <shawn.lin@rock-chips.com>
Fri, 12 Dec 2025 01:33:24 +0000 (09:33 +0800)
committerManivannan Sadhasivam <mani@kernel.org>
Thu, 18 Dec 2025 08:23:17 +0000 (13:53 +0530)
DWC core couldn't distinguish LTSSM state among L1.0, L1.1 and L1.2. But
the vendor glue driver may implement additional logic to convey this
information. So add two pseudo definitions for vendor glue drivers to
translate their internal L1 Substates for debugfs to show.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/1765503205-22184-1-git-send-email-shawn.lin@rock-chips.com
drivers/pci/controller/dwc/pcie-designware-debugfs.c
drivers/pci/controller/dwc/pcie-designware.h

index 0fbf86c..df98fee 100644 (file)
@@ -485,6 +485,8 @@ static const char *ltssm_status_string(enum dw_pcie_ltssm ltssm)
        DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_RCVRY_EQ1);
        DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_RCVRY_EQ2);
        DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_RCVRY_EQ3);
+       DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_L1_1);
+       DW_PCIE_LTSSM_NAME(DW_PCIE_LTSSM_L1_2);
        default:
                str = "DW_PCIE_LTSSM_UNKNOWN";
                break;
index aec4af5..fc9cf8c 100644 (file)
@@ -388,6 +388,10 @@ enum dw_pcie_ltssm {
        DW_PCIE_LTSSM_RCVRY_EQ2 = 0x22,
        DW_PCIE_LTSSM_RCVRY_EQ3 = 0x23,
 
+       /* Vendor glue drivers provide pseudo L1 substates from get_ltssm() */
+       DW_PCIE_LTSSM_L1_1 = 0x141,
+       DW_PCIE_LTSSM_L1_2 = 0x142,
+
        DW_PCIE_LTSSM_UNKNOWN = 0xFFFFFFFF,
 };