drm/nouveau/gsp: add channel class id to gpu hal
authorBen Skeggs <bskeggs@nvidia.com>
Tue, 18 Feb 2025 10:51:56 +0000 (20:51 +1000)
committerDave Airlie <airlied@redhat.com>
Sun, 18 May 2025 20:29:24 +0000 (06:29 +1000)
Use channel class ID from nvkm_rm_gpu, instead of copying it from the
non-GSP HALs.

Signed-off-by: Ben Skeggs <bskeggs@nvidia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Timur Tabi <ttabi@nvidia.com>
Tested-by: Timur Tabi <ttabi@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c

index 170264d..d5b64da 100644 (file)
@@ -18,4 +18,8 @@ ad10x_gpu = {
        },
 
        .usermode.class = AMPERE_USERMODE_A,
+
+       .fifo.chan = {
+               .class = AMPERE_CHANNEL_GPFIFO_A,
+       },
 };
index 164f46e..9bf80e1 100644 (file)
@@ -9,4 +9,8 @@
 const struct nvkm_rm_gpu
 ga100_gpu = {
        .usermode.class = AMPERE_USERMODE_A,
+
+       .fifo.chan = {
+               .class = AMPERE_CHANNEL_GPFIFO_A,
+       },
 };
index f1d4778..55c9014 100644 (file)
@@ -18,4 +18,8 @@ ga1xx_gpu = {
        },
 
        .usermode.class = AMPERE_USERMODE_A,
+
+       .fifo.chan = {
+               .class = AMPERE_CHANNEL_GPFIFO_A,
+       },
 };
index 7d005f7..4aeeb4b 100644 (file)
@@ -21,6 +21,12 @@ struct nvkm_rm_gpu {
        struct {
                u32 class;
        } usermode;
+
+       struct {
+               struct {
+                       u32 class;
+               } chan;
+       } fifo;
 };
 
 extern const struct nvkm_rm_gpu tu1xx_gpu;
index 594a6bb..28ac974 100644 (file)
@@ -31,6 +31,8 @@
 #include <subdev/vfn.h>
 #include <engine/gr.h>
 
+#include <rm/gpu.h>
+
 #include <nvhw/drf.h>
 
 #include "nvrm/fifo.h"
@@ -216,10 +218,6 @@ r535_chan = {
        .doorbell_handle = r535_chan_doorbell_handle,
 };
 
-static const struct nvkm_cgrp_func
-r535_cgrp = {
-};
-
 static int
 r535_engn_nonstall(struct nvkm_engn *engn)
 {
@@ -522,6 +520,7 @@ int
 r535_fifo_new(const struct nvkm_fifo_func *hw, struct nvkm_device *device,
              enum nvkm_subdev_type type, int inst, struct nvkm_fifo **pfifo)
 {
+       const struct nvkm_rm_gpu *gpu = device->gsp->rm->gpu;
        struct nvkm_fifo_func *rm;
 
        if (!(rm = kzalloc(sizeof(*rm), GFP_KERNEL)))
@@ -530,9 +529,7 @@ r535_fifo_new(const struct nvkm_fifo_func *hw, struct nvkm_device *device,
        rm->dtor = r535_fifo_dtor;
        rm->runl_ctor = r535_fifo_runl_ctor;
        rm->runl = &r535_runl;
-       rm->cgrp = hw->cgrp;
-       rm->cgrp.func = &r535_cgrp;
-       rm->chan = hw->chan;
+       rm->chan.user.oclass = gpu->fifo.chan.class;
        rm->chan.func = &r535_chan;
        rm->nonstall = &ga100_fifo_nonstall;
        rm->nonstall_ctor = ga100_fifo_nonstall_ctor;
index 7aea54d..bb674b9 100644 (file)
@@ -18,4 +18,8 @@ tu1xx_gpu = {
        },
 
        .usermode.class = TURING_USERMODE_A,
+
+       .fifo.chan = {
+               .class = TURING_CHANNEL_GPFIFO_A,
+       },
 };