drm/amdgpu: remove RAS unused paramter 'err_addr'
authorYang Wang <kevinyang.wang@amd.com>
Fri, 2 Aug 2024 02:11:37 +0000 (10:11 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 6 Aug 2024 15:11:01 +0000 (11:11 -0400)
- amdgpu_ras_error_statistic_ue_count()
- amdgpu_ras_error_statistic_ce_count()
- amdgpu_ras_error_statistic_de_count()

The parameter 'err_addr' is no longer used since following patch.

Fixes: a7e8467fbeee ("drm/amdgpu: Remove unused code")
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

index 19158cc..929095a 100644 (file)
@@ -453,13 +453,13 @@ static int aca_log_aca_error_data(struct aca_bank_error *bank_error, enum aca_er
 
        switch (type) {
        case ACA_ERROR_TYPE_UE:
-               amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, NULL, count);
+               amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, count);
                break;
        case ACA_ERROR_TYPE_CE:
-               amdgpu_ras_error_statistic_ce_count(err_data, &mcm_info, NULL, count);
+               amdgpu_ras_error_statistic_ce_count(err_data, &mcm_info, count);
                break;
        case ACA_ERROR_TYPE_DEFERRED:
-               amdgpu_ras_error_statistic_de_count(err_data, &mcm_info, NULL, count);
+               amdgpu_ras_error_statistic_de_count(err_data, &mcm_info, count);
                break;
        default:
                break;
index 2542bd7..18ee603 100644 (file)
@@ -396,7 +396,6 @@ static int amdgpu_mca_smu_parse_mca_error_count(struct amdgpu_device *adev, enum
 static int amdgpu_mca_dispatch_mca_set(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,
                                       struct mca_bank_set *mca_set, struct ras_err_data *err_data)
 {
-       struct ras_err_addr err_addr;
        struct amdgpu_smuio_mcm_config_info mcm_info;
        struct mca_bank_node *node, *tmp;
        struct mca_bank_entry *entry;
@@ -421,27 +420,20 @@ static int amdgpu_mca_dispatch_mca_set(struct amdgpu_device *adev, enum amdgpu_r
                        continue;
 
                memset(&mcm_info, 0, sizeof(mcm_info));
-               memset(&err_addr, 0, sizeof(err_addr));
 
                mcm_info.socket_id = entry->info.socket_id;
                mcm_info.die_id = entry->info.aid;
 
-               if (blk == AMDGPU_RAS_BLOCK__UMC) {
-                       err_addr.err_status = entry->regs[MCA_REG_IDX_STATUS];
-                       err_addr.err_ipid = entry->regs[MCA_REG_IDX_IPID];
-                       err_addr.err_addr = entry->regs[MCA_REG_IDX_ADDR];
-               }
-
                if (type == AMDGPU_MCA_ERROR_TYPE_UE) {
                        amdgpu_ras_error_statistic_ue_count(err_data,
-                                                           &mcm_info, &err_addr, (uint64_t)count);
+                                                           &mcm_info, (uint64_t)count);
                } else {
                        if (amdgpu_mca_is_deferred_error(adev, entry->regs[MCA_REG_IDX_STATUS]))
                                amdgpu_ras_error_statistic_de_count(err_data,
-                                                                   &mcm_info, &err_addr, (uint64_t)count);
+                                                                   &mcm_info, (uint64_t)count);
                        else
                                amdgpu_ras_error_statistic_ce_count(err_data,
-                                                                   &mcm_info, &err_addr, (uint64_t)count);
+                                                                   &mcm_info, (uint64_t)count);
                }
 
                amdgpu_mca_bank_set_remove_node(mca_set, node);
index 16da939..61a2f38 100644 (file)
@@ -1223,11 +1223,11 @@ static void amdgpu_rasmgr_error_data_statistic_update(struct ras_manager *obj, s
                for_each_ras_error(err_node, err_data) {
                        err_info = &err_node->err_info;
                        amdgpu_ras_error_statistic_de_count(&obj->err_data,
-                                       &err_info->mcm_info, NULL, err_info->de_count);
+                                       &err_info->mcm_info, err_info->de_count);
                        amdgpu_ras_error_statistic_ce_count(&obj->err_data,
-                                       &err_info->mcm_info, NULL, err_info->ce_count);
+                                       &err_info->mcm_info, err_info->ce_count);
                        amdgpu_ras_error_statistic_ue_count(&obj->err_data,
-                                       &err_info->mcm_info, NULL, err_info->ue_count);
+                                       &err_info->mcm_info, err_info->ue_count);
                }
        } else {
                /* for legacy asic path which doesn't has error source info */
@@ -4618,8 +4618,8 @@ static struct ras_err_info *amdgpu_ras_error_get_info(struct ras_err_data *err_d
 }
 
 int amdgpu_ras_error_statistic_ue_count(struct ras_err_data *err_data,
-               struct amdgpu_smuio_mcm_config_info *mcm_info,
-               struct ras_err_addr *err_addr, u64 count)
+                                       struct amdgpu_smuio_mcm_config_info *mcm_info,
+                                       u64 count)
 {
        struct ras_err_info *err_info;
 
@@ -4640,8 +4640,8 @@ int amdgpu_ras_error_statistic_ue_count(struct ras_err_data *err_data,
 }
 
 int amdgpu_ras_error_statistic_ce_count(struct ras_err_data *err_data,
-               struct amdgpu_smuio_mcm_config_info *mcm_info,
-               struct ras_err_addr *err_addr, u64 count)
+                                       struct amdgpu_smuio_mcm_config_info *mcm_info,
+                                       u64 count)
 {
        struct ras_err_info *err_info;
 
@@ -4662,8 +4662,8 @@ int amdgpu_ras_error_statistic_ce_count(struct ras_err_data *err_data,
 }
 
 int amdgpu_ras_error_statistic_de_count(struct ras_err_data *err_data,
-               struct amdgpu_smuio_mcm_config_info *mcm_info,
-               struct ras_err_addr *err_addr, u64 count)
+                                       struct amdgpu_smuio_mcm_config_info *mcm_info,
+                                       u64 count)
 {
        struct ras_err_info *err_info;
 
index 9625e5c..669720a 100644 (file)
@@ -572,12 +572,6 @@ struct ras_fs_data {
        char debugfs_name[32];
 };
 
-struct ras_err_addr {
-       uint64_t err_status;
-       uint64_t err_ipid;
-       uint64_t err_addr;
-};
-
 struct ras_err_info {
        struct amdgpu_smuio_mcm_config_info mcm_info;
        u64 ce_count;
@@ -939,14 +933,14 @@ void amdgpu_ras_inst_reset_ras_error_count(struct amdgpu_device *adev,
 int amdgpu_ras_error_data_init(struct ras_err_data *err_data);
 void amdgpu_ras_error_data_fini(struct ras_err_data *err_data);
 int amdgpu_ras_error_statistic_ce_count(struct ras_err_data *err_data,
-               struct amdgpu_smuio_mcm_config_info *mcm_info,
-               struct ras_err_addr *err_addr, u64 count);
+                                       struct amdgpu_smuio_mcm_config_info *mcm_info,
+                                       u64 count);
 int amdgpu_ras_error_statistic_ue_count(struct ras_err_data *err_data,
-               struct amdgpu_smuio_mcm_config_info *mcm_info,
-               struct ras_err_addr *err_addr, u64 count);
+                                       struct amdgpu_smuio_mcm_config_info *mcm_info,
+                                       u64 count);
 int amdgpu_ras_error_statistic_de_count(struct ras_err_data *err_data,
-               struct amdgpu_smuio_mcm_config_info *mcm_info,
-               struct ras_err_addr *err_addr, u64 count);
+                                       struct amdgpu_smuio_mcm_config_info *mcm_info,
+                                       u64 count);
 void amdgpu_ras_query_boot_status(struct amdgpu_device *adev, u32 num_instances);
 int amdgpu_ras_bind_aca(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
                               const struct aca_info *aca_info, void *data);
index 821ba23..7de449f 100644 (file)
@@ -1389,10 +1389,10 @@ static void __xgmi_v6_4_0_query_error_count(struct amdgpu_device *adev, struct a
 
        switch (xgmi_v6_4_0_pcs_mca_get_error_type(adev, status)) {
        case ACA_ERROR_TYPE_UE:
-               amdgpu_ras_error_statistic_ue_count(err_data, mcm_info, NULL, 1ULL);
+               amdgpu_ras_error_statistic_ue_count(err_data, mcm_info, 1ULL);
                break;
        case ACA_ERROR_TYPE_CE:
-               amdgpu_ras_error_statistic_ce_count(err_data, mcm_info, NULL, 1ULL);
+               amdgpu_ras_error_statistic_ce_count(err_data, mcm_info, 1ULL);
                break;
        default:
                break;
index c4832a5..8455fda 100644 (file)
@@ -4075,8 +4075,8 @@ static void gfx_v9_4_3_inst_query_ras_err_count(struct amdgpu_device *adev,
        /* the caller should make sure initialize value of
         * err_data->ue_count and err_data->ce_count
         */
-       amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, NULL, ue_count);
-       amdgpu_ras_error_statistic_ce_count(err_data, &mcm_info, NULL, ce_count);
+       amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, ue_count);
+       amdgpu_ras_error_statistic_ce_count(err_data, &mcm_info, ce_count);
 }
 
 static void gfx_v9_4_3_inst_reset_ras_err_count(struct amdgpu_device *adev,
index 621761a..915203b 100644 (file)
@@ -670,8 +670,8 @@ static void mmhub_v1_8_inst_query_ras_error_count(struct amdgpu_device *adev,
                                        AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
                                        &ue_count);
 
-       amdgpu_ras_error_statistic_ce_count(err_data, &mcm_info, NULL, ce_count);
-       amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, NULL, ue_count);
+       amdgpu_ras_error_statistic_ce_count(err_data, &mcm_info, ce_count);
+       amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, ue_count);
 }
 
 static void mmhub_v1_8_query_ras_error_count(struct amdgpu_device *adev,
index cb7fedb..c778890 100644 (file)
@@ -2243,7 +2243,7 @@ static void sdma_v4_4_2_inst_query_ras_error_count(struct amdgpu_device *adev,
                                        AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
                                        &ue_count);
 
-       amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, NULL, ue_count);
+       amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, ue_count);
 }
 
 static void sdma_v4_4_2_query_ras_error_count(struct amdgpu_device *adev,
index 0e6c3ce..1a8ea83 100644 (file)
@@ -157,9 +157,9 @@ static int umc_v12_0_query_error_count(struct amdgpu_device *adev,
        umc_v12_0_query_error_count_per_type(adev, umc_reg_offset,
                                            &de_count, umc_v12_0_is_deferred_error);
 
-       amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, NULL, ue_count);
-       amdgpu_ras_error_statistic_ce_count(err_data, &mcm_info, NULL, ce_count);
-       amdgpu_ras_error_statistic_de_count(err_data, &mcm_info, NULL, de_count);
+       amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, ue_count);
+       amdgpu_ras_error_statistic_ce_count(err_data, &mcm_info, ce_count);
+       amdgpu_ras_error_statistic_de_count(err_data, &mcm_info, de_count);
 
        return 0;
 }