drm/i915/pps: add bxt_ prefix to pps_reset
authorJani Nikula <jani.nikula@intel.com>
Wed, 18 Sep 2024 17:47:42 +0000 (20:47 +0300)
committerJani Nikula <jani.nikula@intel.com>
Thu, 19 Sep 2024 07:48:37 +0000 (10:48 +0300)
The pps_reset member of struct intel_pps is only relevant on
BXT/GLK. Prefix it with bxt_.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7d4552f555936be44fae27ca101007746fcff8c2.1726681620.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_pps.c

index d661640..3e694c1 100644 (file)
@@ -1557,7 +1557,7 @@ struct intel_pps {
         * Set if the sequencer may be reset due to a power transition,
         * requiring a reinitialization. Only relevant on BXT+.
         */
-       bool pps_reset;
+       bool bxt_pps_reset;
        struct edp_power_seq pps_delays;
        struct edp_power_seq bios_pps_delays;
 };
index b7c7384..2d8d911 100644 (file)
@@ -262,10 +262,10 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
        /* We should never land here with regular DP ports */
        drm_WARN_ON(display->drm, !intel_dp_is_edp(intel_dp));
 
-       if (!intel_dp->pps.pps_reset)
+       if (!intel_dp->pps.bxt_pps_reset)
                return pps_idx;
 
-       intel_dp->pps.pps_reset = false;
+       intel_dp->pps.bxt_pps_reset = false;
 
        /*
         * Only the HW needs to be reprogrammed, the SW state is fixed and
@@ -479,7 +479,7 @@ void intel_pps_reset_all(struct intel_display *display)
                        continue;
 
                if (DISPLAY_VER(display) >= 9)
-                       intel_dp->pps.pps_reset = true;
+                       intel_dp->pps.bxt_pps_reset = true;
                else
                        intel_dp->pps.vlv_pps_pipe = INVALID_PIPE;
        }