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riscv: hwprobe: Document SiFive xsfvfnrclipxfqf vendor extension
author
Cyan Yang
<cyan.yang@sifive.com>
Fri, 18 Apr 2025 05:32:34 +0000
(13:32 +0800)
committer
Palmer Dabbelt
<palmer@rivosinc.com>
Thu, 8 May 2025 18:01:44 +0000
(11:01 -0700)
Document the support for SiFive vendor extensions for
FP32-to-int8 Ranged Clip Instructions using
RISCV_HWPROBE_VENDOR_EXT_XSFVFNRCLIPXFQF.
Signed-off-by: Cyan Yang <cyan.yang@sifive.com>
Link:
https://lore.kernel.org/r/20250418053239.4351-8-cyan.yang@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/arch/riscv/hwprobe.rst
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diff --git
a/Documentation/arch/riscv/hwprobe.rst
b/Documentation/arch/riscv/hwprobe.rst
index
16085b2
..
e15405e
100644
(file)
--- a/
Documentation/arch/riscv/hwprobe.rst
+++ b/
Documentation/arch/riscv/hwprobe.rst
@@
-349,3
+349,7
@@
The following keys are defined:
* :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCQOQ`: The Xsfqmaccqoq vendor
extension is supported in version 1.1 of SiFive Int8 Matrix Multiplication
Instruction Extensions Specification.
+
+ * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFNRCLIPXFQF`: The Xsfvfnrclipxfqf
+ vendor extension is supported in version 1.0 of SiFive FP32-to-int8 Ranged
+ Clip Instructions Extensions Specification.