drivers: perf: added capabilities for legacy PMU
authorVadim Shakirov <vadim.shakirov@syntacore.com>
Tue, 27 Feb 2024 17:00:01 +0000 (20:00 +0300)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 27 Feb 2024 20:55:35 +0000 (12:55 -0800)
Added the PERF_PMU_CAP_NO_INTERRUPT flag because the legacy pmu driver
does not provide sampling capabilities

Added the PERF_PMU_CAP_NO_EXCLUDE flag because the legacy pmu driver
does not provide the ability to disable counter incrementation in
different privilege modes

Suggested-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Vadim Shakirov <vadim.shakirov@syntacore.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Fixes: 9b3e150e310e ("RISC-V: Add a simple platform driver for RISC-V  legacy perf")
Link: https://lore.kernel.org/r/20240227170002.188671-2-vadim.shakirov@syntacore.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
drivers/perf/riscv_pmu_legacy.c

index 79fdd66..a85fc9a 100644 (file)
@@ -117,6 +117,8 @@ static void pmu_legacy_init(struct riscv_pmu *pmu)
        pmu->event_mapped = pmu_legacy_event_mapped;
        pmu->event_unmapped = pmu_legacy_event_unmapped;
        pmu->csr_index = pmu_legacy_csr_index;
+       pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
+       pmu->pmu.capabilities |= PERF_PMU_CAP_NO_EXCLUDE;
 
        perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);
 }