pm_runtime_get_sync(dp->dev);
 
+       ret = clk_prepare_enable(dp->clock);
+       if (ret < 0) {
+               DRM_ERROR("Failed to prepare_enable the clock clk [%d]\n", ret);
+               goto out_dp_clk_pre;
+       }
+
        if (dp->plat_data->power_on)
                dp->plat_data->power_on(dp->plat_data);
 
        phy_power_off(dp->phy);
        if (dp->plat_data->power_off)
                dp->plat_data->power_off(dp->plat_data);
+       clk_disable_unprepare(dp->clock);
+out_dp_clk_pre:
        pm_runtime_put_sync(dp->dev);
 
        return ret;
        }
 
        disable_irq(dp->irq);
+       analogix_dp_set_analog_power_down(dp, POWER_ALL, 1);
        phy_power_off(dp->phy);
 
        if (dp->plat_data->power_off)
                dp->plat_data->power_off(dp->plat_data);
 
+       clk_disable_unprepare(dp->clock);
+
        pm_runtime_put_sync(dp->dev);
 
        ret = analogix_dp_prepare_panel(dp, false, true);