drm/i915: Rename plane YUV order bits

Rename the YUV byte order bits to be a bit more consistent.

v2: Deal with gvt

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-3-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 679815b..d881a30 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -682,13 +682,13 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
        case DRM_FORMAT_XYUV8888:
                return PLANE_CTL_FORMAT_XYUV;
        case DRM_FORMAT_YUYV:
-               return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
+               return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_ORDER_YUYV;
        case DRM_FORMAT_YVYU:
-               return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YVYU;
+               return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_ORDER_YVYU;
        case DRM_FORMAT_UYVY:
-               return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_UYVY;
+               return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_ORDER_UYVY;
        case DRM_FORMAT_VYUY:
-               return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
+               return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_ORDER_VYUY;
        case DRM_FORMAT_NV12:
                return PLANE_CTL_FORMAT_NV12;
        case DRM_FORMAT_P010:

diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index 11a8bab..9ec0641 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -427,7 +427,7 @@ int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu,
 
        plane->tiled = !!(val & SPRITE_TILED);
        color_order = !!(val & SPRITE_RGB_ORDER_RGBX);
-       yuv_order = (val & SPRITE_YUV_BYTE_ORDER_MASK) >>
+       yuv_order = (val & SPRITE_YUV_ORDER_MASK) >>
                                _SPRITE_YUV_ORDER_SHIFT;
 
        fmt = (val & SPRITE_PIXFORMAT_MASK) >> _SPRITE_FMT_SHIFT;

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3c85776..7498abb 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6892,7 +6892,7 @@ enum {
 #define   DVS_SOURCE_KEY       (1 << 22)
 #define   DVS_RGB_ORDER_XBGR   (1 << 20)
 #define   DVS_YUV_FORMAT_BT709 (1 << 18)
-#define   DVS_YUV_BYTE_ORDER_MASK (3 << 16)
+#define   DVS_YUV_ORDER_MASK   (3 << 16)
 #define   DVS_YUV_ORDER_YUYV   (0 << 16)
 #define   DVS_YUV_ORDER_UYVY   (1 << 16)
 #define   DVS_YUV_ORDER_YVYU   (2 << 16)
@@ -6971,7 +6971,7 @@ enum {
 #define   SPRITE_RGB_ORDER_RGBX                (1 << 20) /* only for 888 and 161616 */
 #define   SPRITE_YUV_TO_RGB_CSC_DISABLE        (1 << 19)
 #define   SPRITE_YUV_TO_RGB_CSC_FORMAT_BT709   (1 << 18) /* 0 is BT601 */
-#define   SPRITE_YUV_BYTE_ORDER_MASK   (3 << 16)
+#define   SPRITE_YUV_ORDER_MASK                (3 << 16)
 #define   SPRITE_YUV_ORDER_YUYV                (0 << 16)
 #define   SPRITE_YUV_ORDER_UYVY                (1 << 16)
 #define   SPRITE_YUV_ORDER_YVYU                (2 << 16)
@@ -7056,7 +7056,7 @@ enum {
 #define   SP_ALPHA_PREMULTIPLY         (1 << 23) /* CHV pipe B */
 #define   SP_SOURCE_KEY                        (1 << 22)
 #define   SP_YUV_FORMAT_BT709          (1 << 18)
-#define   SP_YUV_BYTE_ORDER_MASK       (3 << 16)
+#define   SP_YUV_ORDER_MASK            (3 << 16)
 #define   SP_YUV_ORDER_YUYV            (0 << 16)
 #define   SP_YUV_ORDER_UYVY            (1 << 16)
 #define   SP_YUV_ORDER_YVYU            (2 << 16)
@@ -7197,10 +7197,10 @@ enum {
 #define   PLANE_CTL_YUV420_Y_PLANE             (1 << 19)
 #define   PLANE_CTL_YUV_TO_RGB_CSC_FORMAT_BT709        (1 << 18)
 #define   PLANE_CTL_YUV422_ORDER_MASK          (0x3 << 16)
-#define   PLANE_CTL_YUV422_YUYV                        (0 << 16)
-#define   PLANE_CTL_YUV422_UYVY                        (1 << 16)
-#define   PLANE_CTL_YUV422_YVYU                        (2 << 16)
-#define   PLANE_CTL_YUV422_VYUY                        (3 << 16)
+#define   PLANE_CTL_YUV422_ORDER_YUYV          (0 << 16)
+#define   PLANE_CTL_YUV422_ORDER_UYVY          (1 << 16)
+#define   PLANE_CTL_YUV422_ORDER_YVYU          (2 << 16)
+#define   PLANE_CTL_YUV422_ORDER_VYUY          (3 << 16)
 #define   PLANE_CTL_RENDER_DECOMPRESSION_ENABLE        (1 << 15)
 #define   PLANE_CTL_TRICKLE_FEED_DISABLE       (1 << 14)
 #define   PLANE_CTL_CLEAR_COLOR_DISABLE                (1 << 13) /* TGL+ */