ds, (unsigned long long)bf->daddr,
                ds->ds_link, ds->ds_data,
                rd->rx_ctl.rx_control_0, rd->rx_ctl.rx_control_1,
-               rd->u.rx_stat.rx_status_0, rd->u.rx_stat.rx_status_1,
+               rd->rx_stat.rx_status_0, rd->rx_stat.rx_status_1,
                !done ? ' ' : (rs->rs_status == 0) ? '*' : '!');
 }
 
 
 {
        struct ath5k_hw_rx_status *rx_status;
 
-       rx_status = &desc->ud.ds_rx.u.rx_stat;
+       rx_status = &desc->ud.ds_rx.rx_stat;
 
        /* No frame received / not ready */
        if (unlikely(!(rx_status->rx_status_1 &
                                        struct ath5k_rx_status *rs)
 {
        struct ath5k_hw_rx_status *rx_status;
-       struct ath5k_hw_rx_error *rx_err;
 
-       rx_status = &desc->ud.ds_rx.u.rx_stat;
-
-       /* Overlay on error */
-       rx_err = &desc->ud.ds_rx.u.rx_err;
+       rx_status = &desc->ud.ds_rx.rx_stat;
 
        /* No frame received / not ready */
        if (unlikely(!(rx_status->rx_status_1 &
                if (rx_status->rx_status_1 &
                                AR5K_5212_RX_DESC_STATUS1_PHY_ERROR) {
                        rs->rs_status |= AR5K_RXERR_PHY;
-                       rs->rs_phyerr |= AR5K_REG_MS(rx_err->rx_error_1,
-                                          AR5K_RX_DESC_ERROR1_PHY_ERROR_CODE);
+                       rs->rs_phyerr |= AR5K_REG_MS(rx_status->rx_status_1,
+                               AR5K_5212_RX_DESC_STATUS1_PHY_ERROR_CODE);
                        ath5k_ani_phy_error_report(ah, rs->rs_phyerr);
                }
 
 
 #define AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP    0x7fff0000
 #define AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP_S  16
 #define AR5K_5212_RX_DESC_STATUS1_KEY_CACHE_MISS       0x80000000
-
-/*
- * common hardware RX error descriptor
- */
-struct ath5k_hw_rx_error {
-       u32     rx_error_0; /* RX status word 0 */
-       u32     rx_error_1; /* RX status word 1 */
-} __packed;
-
-/* RX error word 0 fields/flags */
-#define AR5K_RX_DESC_ERROR0                    0x00000000
-
-/* RX error word 1 fields/flags */
-#define AR5K_RX_DESC_ERROR1_PHY_ERROR_CODE     0x0000ff00
-#define AR5K_RX_DESC_ERROR1_PHY_ERROR_CODE_S   8
+#define AR5K_5212_RX_DESC_STATUS1_PHY_ERROR_CODE       0x0000ff00
+#define AR5K_5212_RX_DESC_STATUS1_PHY_ERROR_CODE_S     8
 
 /**
  * enum ath5k_phy_error_code - PHY Error codes
  * common hardware RX descriptor
  */
 struct ath5k_hw_all_rx_desc {
-       struct ath5k_hw_rx_ctl                  rx_ctl;
-       union {
-               struct ath5k_hw_rx_status       rx_stat;
-               struct ath5k_hw_rx_error        rx_err;
-       } u;
+       struct ath5k_hw_rx_ctl          rx_ctl;
+       struct ath5k_hw_rx_status       rx_stat;
 } __packed;
 
 /*