drm/amd/display: clean up some inconsistent indentings

The indentation of statements in the same curly bracket should be
consistent.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=1886
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c
index c870916..7ebf25e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c
@@ -518,13 +518,16 @@ void dcn321_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_p
 
                        if (dc->ctx->dc_bios->funcs->get_soc_bb_info(dc->ctx->dc_bios, &bb_info) == BP_RESULT_OK) {
                                if (bb_info.dram_clock_change_latency_100ns > 0)
-                                       dcn3_21_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10;
+                                       dcn3_21_soc.dram_clock_change_latency_us =
+                                               bb_info.dram_clock_change_latency_100ns * 10;
 
-                       if (bb_info.dram_sr_enter_exit_latency_100ns > 0)
-                               dcn3_21_soc.sr_enter_plus_exit_time_us = bb_info.dram_sr_enter_exit_latency_100ns * 10;
+                               if (bb_info.dram_sr_enter_exit_latency_100ns > 0)
+                                       dcn3_21_soc.sr_enter_plus_exit_time_us =
+                                               bb_info.dram_sr_enter_exit_latency_100ns * 10;
 
-                       if (bb_info.dram_sr_exit_latency_100ns > 0)
-                               dcn3_21_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10;
+                               if (bb_info.dram_sr_exit_latency_100ns > 0)
+                                       dcn3_21_soc.sr_exit_time_us =
+                                               bb_info.dram_sr_exit_latency_100ns * 10;
                        }
                }