drm/amd/display: Remove last parts of timing_trace
authorDr. David Alan Gilbert <linux@treblig.org>
Thu, 10 Oct 2024 20:51:54 +0000 (21:51 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 4 Nov 2024 16:26:36 +0000 (11:26 -0500)
Commit c2c2ce1e9623 ("drm/amd/display: Optimize passive update planes.")
removed the last caller of context_timing_trace.
Remove it.

With that gone, no one is now looking at the 'timing_trace' flag, remove
it and all the places that set it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
20 files changed:
drivers/gpu/drm/amd/display/dc/core/dc_debug.c
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
drivers/gpu/drm/amd/display/include/logger_interface.h

index 801cdbc..0bb25c5 100644 (file)
                        DC_LOG_IF_TRACE(__VA_ARGS__); \
 } while (0)
 
-#define TIMING_TRACE(...) do {\
-       if (dc->debug.timing_trace) \
-               DC_LOG_SYNC(__VA_ARGS__); \
-} while (0)
-
 #define CLOCK_TRACE(...) do {\
        if (dc->debug.clock_trace) \
                DC_LOG_BANDWIDTH_CALCS(__VA_ARGS__); \
@@ -306,43 +301,6 @@ void post_surface_trace(struct dc *dc)
 
 }
 
-void context_timing_trace(
-               struct dc *dc,
-               struct resource_context *res_ctx)
-{
-       int i;
-       int h_pos[MAX_PIPES] = {0}, v_pos[MAX_PIPES] = {0};
-       struct crtc_position position;
-       unsigned int underlay_idx = dc->res_pool->underlay_pipe_index;
-       DC_LOGGER_INIT(dc->ctx->logger);
-
-
-       for (i = 0; i < dc->res_pool->pipe_count; i++) {
-               struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
-               /* get_position() returns CRTC vertical/horizontal counter
-                * hence not applicable for underlay pipe
-                */
-               if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx)
-                       continue;
-
-               pipe_ctx->stream_res.tg->funcs->get_position(pipe_ctx->stream_res.tg, &position);
-               h_pos[i] = position.horizontal_count;
-               v_pos[i] = position.vertical_count;
-       }
-       for (i = 0; i < dc->res_pool->pipe_count; i++) {
-               struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
-
-               if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx)
-                       continue;
-
-               TIMING_TRACE("OTG_%d   H_tot:%d  V_tot:%d   H_pos:%d  V_pos:%d\n",
-                               pipe_ctx->stream_res.tg->inst,
-                               pipe_ctx->stream->timing.h_total,
-                               pipe_ctx->stream->timing.v_total,
-                               h_pos[i], v_pos[i]);
-       }
-}
-
 void context_clock_trace(
                struct dc *dc,
                struct dc_state *context)
index 72adbab..76130bb 100644 (file)
@@ -868,7 +868,6 @@ struct dc_debug_options {
        bool sanity_checks;
        bool max_disp_clk;
        bool surface_trace;
-       bool timing_trace;
        bool clock_trace;
        bool validation_trace;
        bool bandwidth_calcs_trace;
index 05d6d41..4f1bd71 100644 (file)
@@ -533,7 +533,6 @@ static const struct dc_debug_options debug_defaults_drv = {
                .sanity_checks = true,
                .disable_dmcu = false,
                .force_abm_enable = false,
-               .timing_trace = false,
                .clock_trace = true,
 
                /* raven smu dones't allow 0 disp clk,
@@ -563,7 +562,6 @@ static const struct dc_debug_options debug_defaults_drv = {
 static const struct dc_debug_options debug_defaults_diags = {
                .disable_dmcu = false,
                .force_abm_enable = false,
-               .timing_trace = true,
                .clock_trace = true,
                .disable_stutter = true,
                .disable_pplib_clock_request = true,
index 2881899..189d0c8 100644 (file)
@@ -706,7 +706,6 @@ static const struct resource_caps res_cap_nv14 = {
 static const struct dc_debug_options debug_defaults_drv = {
                .disable_dmcu = false,
                .force_abm_enable = false,
-               .timing_trace = false,
                .clock_trace = true,
                .disable_pplib_clock_request = true,
                .pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
index 15180ad..d3d67d3 100644 (file)
@@ -600,7 +600,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
                .disable_dmcu = true,
                .force_abm_enable = false,
-               .timing_trace = false,
                .clock_trace = true,
                .disable_pplib_clock_request = true,
                .pipe_split_policy = MPC_SPLIT_DYNAMIC,
index 14b2884..021ba8a 100644 (file)
@@ -610,7 +610,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
                .disable_dmcu = false,
                .force_abm_enable = false,
-               .timing_trace = false,
                .clock_trace = true,
                .disable_pplib_clock_request = true,
                .min_disp_clk_khz = 100000,
index baa4e26..cd31e4f 100644 (file)
@@ -711,7 +711,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
        .disable_dmcu = true, //No DMCU on DCN30
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = true,
        .pipe_split_policy = MPC_SPLIT_DYNAMIC,
index d8a7c2c..a9816af 100644 (file)
@@ -682,7 +682,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_dpp_power_gate = false,
        .disable_hubp_power_gate = false,
index 40c20b0..02af8b8 100644 (file)
@@ -81,7 +81,6 @@
 static const struct dc_debug_options debug_defaults_drv = {
                .disable_dmcu = true,
                .force_abm_enable = false,
-               .timing_trace = false,
                .clock_trace = true,
                .disable_pplib_clock_request = true,
                .pipe_split_policy = MPC_SPLIT_DYNAMIC,
index daf1b65..7002a8d 100644 (file)
@@ -82,7 +82,6 @@
 static const struct dc_debug_options debug_defaults_drv = {
                .disable_dmcu = true,
                .force_abm_enable = false,
-               .timing_trace = false,
                .clock_trace = true,
                .disable_pplib_clock_request = true,
                .pipe_split_policy = MPC_SPLIT_AVOID,
index 36bb261..f71a5b8 100644 (file)
@@ -858,7 +858,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = false,
        .pipe_split_policy = MPC_SPLIT_DYNAMIC,
index 58a5fbc..8aa10da 100644 (file)
@@ -876,7 +876,6 @@ static const struct dc_debug_options debug_defaults_drv = {
        .replay_skip_crtc_disabled = true,
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_dpp_power_gate = false,
        .disable_hubp_power_gate = false,
index 3acad70..6c32952 100644 (file)
@@ -858,7 +858,6 @@ static const struct dc_debug_options debug_defaults_drv = {
        .disable_z10 = true, /*hw not support it*/
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = false,
        .pipe_split_policy = MPC_SPLIT_DYNAMIC,
index ce56f5d..6edaaad 100644 (file)
@@ -853,7 +853,6 @@ static const struct dc_debug_options debug_defaults_drv = {
        .disable_z10 = true, /*hw not support it*/
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = false,
        .pipe_split_policy = MPC_SPLIT_DYNAMIC,
index aaaa888..01d1a11 100644 (file)
@@ -689,7 +689,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = false,
        .pipe_split_policy = MPC_SPLIT_AVOID, // Due to CRB, no need to MPC split anymore
index 35acc13..5cb74fd 100644 (file)
@@ -686,7 +686,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = false,
        .pipe_split_policy = MPC_SPLIT_AVOID,
index 795f2c7..6cc2960 100644 (file)
@@ -712,7 +712,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = false,
        .pipe_split_policy = MPC_SPLIT_AVOID,
index 0b8dc2e..d87e264 100644 (file)
@@ -692,7 +692,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = false,
        .pipe_split_policy = MPC_SPLIT_AVOID,
index 306b411..db93bac 100644 (file)
@@ -685,7 +685,6 @@ static const struct dc_plane_cap plane_cap = {
 static const struct dc_debug_options debug_defaults_drv = {
        .disable_dmcu = true,
        .force_abm_enable = false,
-       .timing_trace = false,
        .clock_trace = true,
        .disable_pplib_clock_request = false,
        .pipe_split_policy = MPC_SPLIT_AVOID,
index 02c23b0..058f882 100644 (file)
@@ -52,10 +52,6 @@ void update_surface_trace(
 
 void post_surface_trace(struct dc *dc);
 
-void context_timing_trace(
-               struct dc *dc,
-               struct resource_context *res_ctx);
-
 void context_clock_trace(
                struct dc *dc,
                struct dc_state *context);