struct amdgpu_crtc *amdgpu_crtc;
struct common_irq_params *irq_params = interrupt_params;
struct amdgpu_device *adev = irq_params->adev;
+ struct drm_device *dev = adev_to_drm(adev);
unsigned long flags;
struct drm_pending_vblank_event *e;
u32 vpos, hpos, v_blank_start, v_blank_end;
/* IRQ could occur when in initial stage */
/* TODO work and BO cleanup */
if (amdgpu_crtc == NULL) {
- DC_LOG_PFLIP("CRTC is null, returning.\n");
+ drm_dbg_state(dev, "CRTC is null, returning.\n");
return;
}
spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_SUBMITTED) {
- DC_LOG_PFLIP("amdgpu_crtc->pflip_status = %d !=AMDGPU_FLIP_SUBMITTED(%d) on crtc:%d[%p]\n",
- amdgpu_crtc->pflip_status,
- AMDGPU_FLIP_SUBMITTED,
- amdgpu_crtc->crtc_id,
- amdgpu_crtc);
+ drm_dbg_state(dev,
+ "amdgpu_crtc->pflip_status = %d != AMDGPU_FLIP_SUBMITTED(%d) on crtc:%d[%p]\n",
+ amdgpu_crtc->pflip_status, AMDGPU_FLIP_SUBMITTED,
+ amdgpu_crtc->crtc_id, amdgpu_crtc);
spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags);
return;
}
amdgpu_crtc->pflip_status = AMDGPU_FLIP_NONE;
spin_unlock_irqrestore(&adev_to_drm(adev)->event_lock, flags);
- DC_LOG_PFLIP("crtc:%d[%p], pflip_stat:AMDGPU_FLIP_NONE, vrr[%d]-fp %d\n",
- amdgpu_crtc->crtc_id, amdgpu_crtc,
- vrr_active, (int) !e);
+ drm_dbg_state(dev,
+ "crtc:%d[%p], pflip_stat:AMDGPU_FLIP_NONE, vrr[%d]-fp %d\n",
+ amdgpu_crtc->crtc_id, amdgpu_crtc, vrr_active, (int)!e);
}
static void dm_vupdate_high_irq(void *interrupt_params)
atomic64_set(&irq_params->previous_timestamp, vblank->time);
}
- DC_LOG_VBLANK("crtc:%d, vupdate-vrr:%d\n",
- acrtc->crtc_id,
- vrr_active);
+ drm_dbg_vbl(drm_dev,
+ "crtc:%d, vupdate-vrr:%d\n", acrtc->crtc_id,
+ vrr_active);
/* Core vblank handling is done here after end of front-porch in
* vrr mode, as vblank timestamping will give valid results
vrr_active = amdgpu_dm_crtc_vrr_active_irq(acrtc);
- DC_LOG_VBLANK("crtc:%d, vupdate-vrr:%d, planes:%d\n", acrtc->crtc_id,
- vrr_active, acrtc->dm_irq_params.active_planes);
+ drm_dbg_vbl(adev_to_drm(adev),
+ "crtc:%d, vupdate-vrr:%d, planes:%d\n", acrtc->crtc_id,
+ vrr_active, acrtc->dm_irq_params.active_planes);
/**
* Core vblank handling at start of front-porch is only possible
struct display_sink_capability sink_caps = { 0 };
enum dc_edid_status edid_status;
struct dc_context *dc_ctx = link->ctx;
+ struct drm_device *dev = adev_to_drm(dc_ctx->driver_context);
struct dc_sink *sink = NULL;
struct dc_sink *prev_sink = NULL;
}
default:
- DC_ERROR("Invalid connector type! signal:%d\n",
+ drm_err(dev, "Invalid connector type! signal:%d\n",
link->connector_signal);
return;
}
sink = dc_sink_create(&sink_init_data);
if (!sink) {
- DC_ERROR("Failed to create sink!\n");
+ drm_err(dev, "Failed to create sink!\n");
return;
}
sink);
if (edid_status != EDID_OK)
- DC_ERROR("Failed to read EDID");
+ drm_err(dev, "Failed to read EDID\n");
}
bundle = kzalloc(sizeof(*bundle), GFP_KERNEL);
if (!bundle) {
- dm_error("Failed to allocate update bundle\n");
+ drm_err(dm->ddev, "Failed to allocate update bundle\n");
goto cleanup;
}
aconnector->timing_requested =
kzalloc(sizeof(struct dc_crtc_timing), GFP_KERNEL);
if (!aconnector->timing_requested)
- dm_error("failed to create aconnector->requested_timing\n");
+ drm_err(dev,
+ "failed to create aconnector->requested_timing\n");
}
drm_connector_update_edid_property(connector, aconnector->edid);
requested_bpc);
if (aconnector->timing_changed) {
- DC_LOG_DEBUG("%s: overriding timing for automated test, bpc %d, changing to %d\n",
- __func__,
- stream->timing.display_color_depth,
- aconnector->timing_requested->display_color_depth);
+ drm_dbg(aconnector->base.dev,
+ "overriding timing for automated test, bpc %d, changing to %d\n",
+ stream->timing.display_color_depth,
+ aconnector->timing_requested->display_color_depth);
stream->timing = *aconnector->timing_requested;
}
/* Mark this event as consumed */
acrtc->base.state->event = NULL;
- DC_LOG_PFLIP("crtc:%d, pflip_stat:AMDGPU_FLIP_SUBMITTED\n",
- acrtc->crtc_id);
+ drm_dbg_state(acrtc->base.dev,
+ "crtc:%d, pflip_stat:AMDGPU_FLIP_SUBMITTED\n",
+ acrtc->crtc_id);
}
static void update_freesync_state_on_stream(
bundle = kzalloc(sizeof(*bundle), GFP_KERNEL);
if (!bundle) {
- dm_error("Failed to allocate update bundle\n");
+ drm_err(dev, "Failed to allocate update bundle\n");
goto cleanup;
}
status = dc_stream_get_status_from_state(dc_state,
dm_new_crtc_state->stream);
if (!status)
- DC_ERR("got no status for stream %p on acrtc%p\n", dm_new_crtc_state->stream, acrtc);
+ drm_err(dev,
+ "got no status for stream %p on acrtc%p\n",
+ dm_new_crtc_state->stream, acrtc);
else
acrtc->otg_inst = status->primary_otg_inst;
}
{
#ifdef DM_CHECK_ADDR_0
if (address == 0) {
- DC_ERR("invalid register write. address = 0");
+ drm_err(adev_to_drm(ctx->driver_context),
+ "invalid register write. address = 0");
return;
}
#endif
u32 value;
#ifdef DM_CHECK_ADDR_0
if (address == 0) {
- DC_ERR("invalid register read; address = 0\n");
+ drm_err(adev_to_drm(ctx->driver_context),
+ "invalid register read; address = 0\n");
return 0;
}
#endif
struct amdgpu_dm_connector *aconnector = link->priv;
if (!aconnector) {
- DC_LOG_DC("Failed to find connector for link!\n");
+ drm_dbg_dp(aconnector->base.dev,
+ "Failed to find connector for link!\n");
return false;
}
drm_dp_dpcd_read(aux, SYNAPTICS_RC_DATA, data, length);
}
- DC_LOG_DC("%s: success = %d\n", __func__, success);
+ drm_dbg_dp(aux->drm_dev, "success = %d\n", success);
return success;
}
{
unsigned char data[16] = {0};
- DC_LOG_DC("Start %s\n", __func__);
+ drm_dbg_dp(aux->drm_dev, "Start\n");
// Step 2
data[0] = 'P';
if (!execute_synaptics_rc_command(aux, true, 0x02, 0, 0, NULL))
return;
- DC_LOG_DC("Done %s\n", __func__);
+ drm_dbg_dp(aux->drm_dev, "Done\n");
}
/* MST Dock */
{
uint8_t ret = 0;
- DC_LOG_DC("Configure DSC to non-virtual dpcd synaptics\n");
+ drm_dbg_dp(aux->drm_dev,
+ "Configure DSC to non-virtual dpcd synaptics\n");
if (enable) {
/* When DSC is enabled on previous boot and reboot with the hub,
static const uint8_t DSC_DECODING = 0x01;
static const uint8_t DSC_PASSTHROUGH = 0x02;
- struct amdgpu_dm_connector *aconnector;
+ struct amdgpu_dm_connector *aconnector =
+ (struct amdgpu_dm_connector *)stream->dm_stream_context;
+ struct drm_device *dev = aconnector->base.dev;
struct drm_dp_mst_port *port;
uint8_t enable_dsc = enable ? DSC_DECODING : DSC_DISABLE;
uint8_t enable_passthrough = enable ? DSC_PASSTHROUGH : DSC_DISABLE;
return false;
if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
- aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
-
if (!aconnector->dsc_aux)
return false;
ret = drm_dp_dpcd_write(port->passthrough_aux,
DP_DSC_ENABLE,
&enable_passthrough, 1);
- DC_LOG_DC("Sent DSC pass-through enable to virtual dpcd port, ret = %u\n",
- ret);
+ drm_dbg_dp(dev,
+ "Sent DSC pass-through enable to virtual dpcd port, ret = %u\n",
+ ret);
}
ret = drm_dp_dpcd_write(aconnector->dsc_aux,
DP_DSC_ENABLE, &enable_dsc, 1);
- DC_LOG_DC("Sent DSC decoding enable to %s port, ret = %u\n",
- (port->passthrough_aux) ? "remote RX" :
- "virtual dpcd",
- ret);
+ drm_dbg_dp(dev,
+ "Sent DSC decoding enable to %s port, ret = %u\n",
+ (port->passthrough_aux) ? "remote RX" :
+ "virtual dpcd",
+ ret);
} else {
ret = drm_dp_dpcd_write(aconnector->dsc_aux,
DP_DSC_ENABLE, &enable_dsc, 1);
- DC_LOG_DC("Sent DSC decoding disable to %s port, ret = %u\n",
- (port->passthrough_aux) ? "remote RX" :
- "virtual dpcd",
- ret);
+ drm_dbg_dp(dev,
+ "Sent DSC decoding disable to %s port, ret = %u\n",
+ (port->passthrough_aux) ? "remote RX" :
+ "virtual dpcd",
+ ret);
if (port->passthrough_aux) {
ret = drm_dp_dpcd_write(port->passthrough_aux,
DP_DSC_ENABLE,
&enable_passthrough, 1);
- DC_LOG_DC("Sent DSC pass-through disable to virtual dpcd port, ret = %u\n",
- ret);
+ drm_dbg_dp(dev,
+ "Sent DSC pass-through disable to virtual dpcd port, ret = %u\n",
+ ret);
}
}
}
if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT || stream->signal == SIGNAL_TYPE_EDP) {
if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_NONE) {
ret = dm_helpers_dp_write_dpcd(ctx, stream->link, DP_DSC_ENABLE, &enable_dsc, 1);
- DC_LOG_DC("Send DSC %s to SST RX\n", enable_dsc ? "enable" : "disable");
+ drm_dbg_dp(dev,
+ "Send DSC %s to SST RX\n",
+ enable_dsc ? "enable" : "disable");
} else if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) {
ret = dm_helpers_dp_write_dpcd(ctx, stream->link, DP_DSC_ENABLE, &enable_dsc, 1);
- DC_LOG_DC("Send DSC %s to DP-HDMI PCON\n", enable_dsc ? "enable" : "disable");
+ drm_dbg_dp(dev,
+ "Send DSC %s to DP-HDMI PCON\n",
+ enable_dsc ? "enable" : "disable");
}
}
struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx;
struct pipe_ctx *pipe_ctx = NULL;
struct amdgpu_dm_connector *aconnector = link->priv;
+ struct drm_device *dev = aconnector->base.dev;
int i;
for (i = 0; i < MAX_PIPES; i++) {
&& pipe_ctx->stream->timing.display_color_depth != requestColorDepth)
|| (requestPixelEncoding != PIXEL_ENCODING_UNDEFINED
&& pipe_ctx->stream->timing.pixel_encoding != requestPixelEncoding)) {
- DC_LOG_DEBUG("%s: original bpc %d pix encoding %d, changing to %d %d\n",
- __func__,
- pipe_ctx->stream->timing.display_color_depth,
- pipe_ctx->stream->timing.pixel_encoding,
- requestColorDepth,
- requestPixelEncoding);
+ drm_dbg(dev,
+ "original bpc %d pix encoding %d, changing to %d %d\n",
+ pipe_ctx->stream->timing.display_color_depth,
+ pipe_ctx->stream->timing.pixel_encoding,
+ requestColorDepth,
+ requestPixelEncoding);
pipe_ctx->stream->timing.display_color_depth = requestColorDepth;
pipe_ctx->stream->timing.pixel_encoding = requestPixelEncoding;
if (aconnector->timing_requested)
*aconnector->timing_requested = pipe_ctx->stream->timing;
else
- DC_LOG_ERROR("%s: timing storage failed\n", __func__);
+ drm_err(dev, "timing storage failed\n");
}
if (dc_link->sink_count)
dc_link_remove_remote_sink(dc_link, dc_sink);
- DC_LOG_MST("DM_MST: remove remote sink 0x%p, %d remaining\n",
- dc_sink, dc_link->sink_count);
+ drm_dbg_dp(connector->dev,
+ "DM_MST: remove remote sink 0x%p, %d remaining\n",
+ dc_sink, dc_link->sink_count);
dc_sink_release(dc_sink);
aconnector->dc_sink = NULL;
return 0;
}
- DC_LOG_MST("DM_MST: add remote sink 0x%p, %d remaining\n",
- dc_sink, aconnector->dc_link->sink_count);
+ drm_dbg_dp(connector->dev,
+ "DM_MST: add remote sink 0x%p, %d remaining\n",
+ dc_sink,
+ aconnector->dc_link->sink_count);
dc_sink->priv = aconnector;
aconnector->dc_sink = dc_sink;
return 0;
}
- DC_LOG_MST("DM_MST: add remote sink 0x%p, %d remaining\n",
- dc_sink, aconnector->dc_link->sink_count);
+ drm_dbg_dp(connector->dev,
+ "DM_MST: add remote sink 0x%p, %d remaining\n",
+ dc_sink, aconnector->dc_link->sink_count);
dc_sink->priv = aconnector;
/* dc_link_add_remote_sink returns a new reference */
if (aconnector->dc_link->sink_count)
dc_link_remove_remote_sink(aconnector->dc_link, aconnector->dc_sink);
- DC_LOG_MST("DM_MST: remove remote sink 0x%p, %d remaining\n",
- aconnector->dc_link, aconnector->dc_link->sink_count);
+ drm_dbg_dp(connector->dev,
+ "DM_MST: remove remote sink 0x%p, %d remaining\n",
+ aconnector->dc_link,
+ aconnector->dc_link->sink_count);
dc_sink_release(aconnector->dc_sink);
aconnector->dc_sink = NULL;
if (!plane->state->fb && !old_plane_state->fb)
return;
- DC_LOG_CURSOR("%s: crtc_id=%d with size %d to %d\n",
- __func__,
- amdgpu_crtc->crtc_id,
- plane->state->crtc_w,
- plane->state->crtc_h);
+ drm_dbg_atomic(plane->dev, "crtc_id=%d with size %d to %d\n",
+ amdgpu_crtc->crtc_id, plane->state->crtc_w,
+ plane->state->crtc_h);
ret = get_cursor_position(plane, crtc, &position);
if (ret)
struct board_layout_info *board_layout_info)
{
unsigned int i;
+ struct bios_parser *bp;
enum bp_result record_result;
const unsigned int slot_index_to_vbios_id[MAX_BOARD_SLOTS] = {
0, 0
};
+ bp = BP_FROM_DCB(dcb);
+
if (board_layout_info == NULL) {
DC_LOG_DETECTION_EDID_PARSER("Invalid board_layout_info\n");
return BP_RESULT_BADINPUT;
#define CTX \
clk_mgr->base.ctx
-#define DC_LOGGER \
- clk_mgr->base.ctx->logger
static const struct clk_mgr_registers clk_mgr_regs = {
CLK_COMMON_REG_LIST_DCN_201()
#include "dm_services.h"
+#include "amdgpu.h"
+
#include "dc.h"
#include "core_status.h"
if (dc->ctx->created_bios)
dal_bios_parser_destroy(&dc->ctx->dc_bios);
+ kfree(dc->ctx->logger);
dc_perf_trace_destroy(&dc->ctx->perf_trace);
kfree(dc->ctx);
dc_ctx->clk_reg_offsets = init_params->clk_reg_offsets;
/* Create logger */
+ dc_ctx->logger = kmalloc(sizeof(*dc_ctx->logger), GFP_KERNEL);
+
+ if (!dc_ctx->logger) {
+ kfree(dc_ctx);
+ return false;
+ }
+
+ dc_ctx->logger->dev = adev_to_drm(init_params->driver);
+ dc->dml.logger = dc_ctx->logger;
dc_ctx->dce_version = resource_parse_asic_id(init_params->asic_id);
#include "resource.h"
+#define DC_LOGGER \
+ dc->ctx->logger
#define DC_LOGGER_INIT(logger)
*/
#define VISUAL_CONFIRM_DPP_OFFSET_DENO 240
+#define DC_LOGGER \
+ dc->ctx->logger
#define DC_LOGGER_INIT(logger)
#define UNABLE_TO_SPLIT -1
}
}
-void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dmub_srv)
+void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dc_dmub_srv)
{
- struct dmub_srv *dmub = dmub_srv->dmub;
- struct dc_context *dc_ctx = dmub_srv->ctx;
+ struct dmub_srv *dmub = dc_dmub_srv->dmub;
+ struct dc_context *dc_ctx = dc_dmub_srv->ctx;
enum dmub_status status = DMUB_STATUS_OK;
status = dmub_srv_clear_inbox0_ack(dmub);
if (status != DMUB_STATUS_OK) {
DC_ERROR("Error clearing INBOX0 ack: status=%d\n", status);
- dc_dmub_srv_log_diagnostic_data(dmub_srv);
+ dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);
}
}
-void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dmub_srv)
+void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dc_dmub_srv)
{
- struct dmub_srv *dmub = dmub_srv->dmub;
- struct dc_context *dc_ctx = dmub_srv->ctx;
+ struct dmub_srv *dmub = dc_dmub_srv->dmub;
+ struct dc_context *dc_ctx = dc_dmub_srv->ctx;
enum dmub_status status = DMUB_STATUS_OK;
status = dmub_srv_wait_for_inbox0_ack(dmub, 100000);
if (status != DMUB_STATUS_OK) {
DC_ERROR("Error waiting for INBOX0 HW Lock Ack\n");
- dc_dmub_srv_log_diagnostic_data(dmub_srv);
+ dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);
}
}
-void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv,
- union dmub_inbox0_data_register data)
+void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dc_dmub_srv,
+ union dmub_inbox0_data_register data)
{
- struct dmub_srv *dmub = dmub_srv->dmub;
- struct dc_context *dc_ctx = dmub_srv->ctx;
+ struct dmub_srv *dmub = dc_dmub_srv->dmub;
+ struct dc_context *dc_ctx = dc_dmub_srv->ctx;
enum dmub_status status = DMUB_STATUS_OK;
status = dmub_srv_send_inbox0_cmd(dmub, data);
if (status != DMUB_STATUS_OK) {
DC_ERROR("Error sending INBOX0 cmd\n");
- dc_dmub_srv_log_diagnostic_data(dmub_srv);
+ dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);
}
}
#include "dc_dmub_srv.h"
#include "reg_helper.h"
+#define DC_LOGGER \
+ ctx->logger
+
static inline void submit_dmub_read_modify_write(
struct dc_reg_helper_state *offload,
const struct dc_context *ctx)
struct dc *dc;
void *driver_context; /* e.g. amdgpu_device */
+ struct dal_logger *logger;
struct dc_perf_trace *perf_trace;
void *cgs_device;
#define CTX \
clk_src->base.ctx
-#define DC_LOGGER_INIT()
+#define DC_LOGGER \
+ calc_pll_cs->ctx->logger
+#define DC_LOGGER_INIT() \
+ struct calc_pll_clock_source *calc_pll_cs = &clk_src->calc_pll
#undef FN
#define FN(reg_name, field_name) \
struct pll_settings *pll_settings)
{
unsigned long long actual_pix_clk_100Hz = pix_clk_params ? pix_clk_params->requested_pix_clk_100hz : 0;
+ struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(cs);
DC_LOGGER_INIT();
#define CTX \
hws->ctx
-#define DC_LOGGER_INIT()
+#define DC_LOGGER \
+ ctx->logger
+#define DC_LOGGER_INIT() \
+ struct dc_context *ctx = dc->ctx
#define REG(reg)\
hws->regs->reg
struct dc_context *dc_ctx,
struct timing_generator *tg)
{
+ struct dc_context *ctx = dc_ctx;
bool rc = false;
/* To avoid endless loop we wait at most
struct dc_context *dc_ctx = dc->ctx;
struct dcp_gsl_params gsl_params = { 0 };
int i;
+ DC_LOGGER_INIT();
DC_SYNC_INFO("GSL: Setting-up...\n");
struct dc_context *dc_ctx = dc->ctx;
struct dcp_gsl_params gsl_params = { 0 };
int i;
+ DC_LOGGER_INIT();
gsl_params.gsl_group = 0;
gsl_params.gsl_master = 0;
unsigned int i;
struct dce_hwseq *hws = dc->hwseq;
- DC_LOGGER_INIT();
memset(&tbl_entry, 0, sizeof(tbl_entry));
memset(&adjust, 0, sizeof(adjust));
#include "dce/dmub_outbox.h"
#include "link.h"
-#define DC_LOGGER_INIT(logger)
+#define DC_LOGGER \
+ dc_logger
+#define DC_LOGGER_INIT(logger) \
+ struct dal_logger *dc_logger = logger
#define CTX \
hws->ctx
// DC_LOG_ALL_TF_POINTS logs all channels of the tf
int i = 0;
- DC_LOGGER_INIT(ctx->logger);
DC_LOG_GAMMA("Gamma Correction TF");
DC_LOG_ALL_GAMMA("Logging all tf points...");
DC_LOG_ALL_TF_CHANNELS("Logging all channels...");
{
bool rc = false;
+ DC_LOGGER_INIT(dc_ctx->logger);
+
/* To avoid endless loop we wait at most
* frames_to_wait_on_triggered_reset frames for the reset to occur. */
const uint32_t frames_to_wait_on_triggered_reset = 10;
uint32_t dp_ref_clk_100hz =
dc->res_pool->dp_clock_source->ctx->dc->clk_mgr->dprefclk_khz*10;
+ DC_LOGGER_INIT(dc_ctx->logger);
+
hw_crtc_timing = kcalloc(MAX_PIPES, sizeof(*hw_crtc_timing), GFP_KERNEL);
if (!hw_crtc_timing)
return master;
struct timing_generator *tg;
int i, width, height, master;
+ DC_LOGGER_INIT(dc_ctx->logger);
+
for (i = 1; i < group_size; i++) {
opp = grouped_pipes[i]->stream_res.opp;
tg = grouped_pipes[i]->stream_res.tg;
struct timing_generator *tg;
int i, width, height;
+ DC_LOGGER_INIT(dc_ctx->logger);
+
DC_SYNC_INFO("Setting up OTG reset trigger\n");
for (i = 1; i < group_size; i++) {
struct dc_context *dc_ctx = dc->ctx;
int i;
+ DC_LOGGER_INIT(dc_ctx->logger);
+
DC_SYNC_INFO("Setting up\n");
for (i = 0; i < group_size; i++)
if (grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset)
{
int i;
- DC_LOGGER_INIT(dc->ctx->logger);
-
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
#include "reg_helper.h"
#include "basics/conversion.h"
+#define DC_LOGGER \
+ ctx->logger
#define DC_LOGGER_INIT(logger)
#define REG(reg)\
#include "link_hwss.h"
#include "link.h"
-#define DC_LOGGER_INIT(logger)
+#define DC_LOGGER \
+ dc_logger
+#define DC_LOGGER_INIT(logger) \
+ struct dal_logger *dc_logger = logger
#define CTX \
hws->ctx
unsigned int polling_interval_us = 1;
struct dce_hwseq *hwseq = dc->hwseq;
- DC_LOGGER_INIT(dc->ctx->logger);
-
for (i = 0; i < dc->res_pool->pipe_count; i++)
if (context->res_ctx.pipe_ctx[i].update_flags.bits.disable)
dc->hwss.disable_plane(dc, &dc->current_state->res_ctx.pipe_ctx[i]);
#define FN(reg_name, field_name) \
vmid->shifts->field_name, vmid->masks->field_name
+#define DC_LOGGER \
+ CTX->logger
+
static void dcn20_wait_for_vmid_ready(struct dcn20_vmid *vmid)
{
/* According the hardware spec, we need to poll for the lowest
#include "dc_dmub_srv.h"
+#define DC_LOGGER \
+ ctx->logger
#define DC_LOGGER_INIT(logger)
#define REG(reg)\
#include "amdgpu_socbb.h"
#include "dc_dmub_srv.h"
+#define DC_LOGGER \
+ dc->ctx->logger
#define DC_LOGGER_INIT(logger)
enum dcn30_clk_src_array_id {
#define TO_DCN301_RES_POOL(pool)\
container_of(pool, struct dcn301_resource_pool, base)
+#define DC_LOGGER \
+ dc->ctx->logger
#define DC_LOGGER_INIT(logger)
enum dcn301_clk_src_array_id {
#include "nbio/nbio_7_4_offset.h"
#include "amdgpu_socbb.h"
+#define DC_LOGGER \
+ dc->ctx->logger
#define DC_LOGGER_INIT(logger)
static const struct dc_debug_options debug_defaults_drv = {
#include "dml/dcn303/dcn303_fpu.h"
+#define DC_LOGGER \
+ dc->ctx->logger
#define DC_LOGGER_INIT(logger)
#include "link_enc_cfg.h"
+#define DC_LOGGER \
+ dc->ctx->logger
#define DC_LOGGER_INIT(logger)
enum dcn31_clk_src_array_id {
#define REG(reg)\
hws->regs->reg
#define DC_LOGGER \
- dc->ctx->logger
+ stream->ctx->logger
#undef FN
#define regBIF_BX2_BIOS_SCRATCH_6 0x003e
#define regBIF_BX2_BIOS_SCRATCH_6_BASE_IDX 1
+#define DC_LOGGER \
+ dc->ctx->logger
#define DC_LOGGER_INIT(logger)
enum dcn31_clk_src_array_id {
#define REG(reg)\
hws->regs->reg
#define DC_LOGGER \
- dc->ctx->logger
+ stream->ctx->logger
#undef FN
#include "dcn31/dcn31_hwseq.h"
#include "dcn20/dcn20_hwseq.h"
-#define DC_LOGGER_INIT(logger)
+#define DC_LOGGER_INIT(logger) \
+ struct dal_logger *dc_logger = logger
#define CTX \
hws->ctx
#define REG(reg)\
hws->regs->reg
#define DC_LOGGER \
- dc->ctx->logger
+ dc_logger
#undef FN
struct pipe_ctx *odm_pipe;
int opp_cnt = 1;
+ DC_LOGGER_INIT(stream->ctx->logger);
+
ASSERT(dsc);
for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe)
opp_cnt++;
#include "link.h"
#include "dcn20_fpu.h"
+#define DC_LOGGER \
+ dc->ctx->logger
#define DC_LOGGER_INIT(logger)
#ifndef MAX
clk_mgr->base.ctx
#define DC_LOGGER \
- clk_mgr->base.ctx->logger
+ dc->ctx->logger
#include "link_hwss_dio.h"
#include "link_enc_cfg.h"
+#define DC_LOGGER \
+ link->ctx->logger
#define DC_LOGGER_INIT(logger)
static void update_dpia_stream_allocation_table(struct dc_link *link,
#include "dm_helpers.h"
#include "clk_mgr.h"
+#define DC_LOGGER \
+ link->ctx->logger
#define DC_LOGGER_INIT(logger)
#define LINK_INFO(...) \
bool is_type2_dongle = false;
int retry_count = 2;
struct dp_hdmi_dongle_signature_data *dongle_signature;
+ struct dc_link *link = ddc->link;
/* Assume we have no valid DP passive dongle connected */
*dongle = DISPLAY_DONGLE_NONE;
#include "dccg.h"
#include "clk_mgr.h"
#include "atomfirmware.h"
-#define DC_LOGGER_INIT(logger)
+#define DC_LOGGER \
+ dc_logger
+#define DC_LOGGER_INIT(logger) \
+ struct dal_logger *dc_logger = logger
#define LINK_INFO(...) \
DC_LOG_HW_HOTPLUG( \
struct dc_link *link = stream->sink->link;
struct vpg *vpg = pipe_ctx->stream_res.stream_enc->vpg;
+ DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
+
ASSERT(is_master_pipe_for_link(link, pipe_ctx));
if (dp_is_128b_132b_signal(pipe_ctx))
if (dc_is_virtual_signal(pipe_ctx->stream->signal))
return;
- DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
-
if (pipe_ctx->stream->sink) {
if (pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_NONE) {
bool apply_edp_fast_boot_optimization =
pipe_ctx->stream->apply_edp_fast_boot_optimization;
+ DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
+
ASSERT(is_master_pipe_for_link(link, pipe_ctx));
if (dp_is_128b_132b_signal(pipe_ctx))
if (dc_is_virtual_signal(pipe_ctx->stream->signal))
return;
- DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
-
if (pipe_ctx->stream->sink) {
if (pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_NONE) {
#include "gpio_service_interface.h"
#include "atomfirmware.h"
+#define DC_LOGGER \
+ dc_ctx->logger
#define DC_LOGGER_INIT(logger)
#define LINK_INFO(...) \
#include "dm_helpers.h"
#include "atomfirmware.h"
+#define DC_LOGGER \
+ ddc_service->ctx->logger
#define DC_LOGGER_INIT(logger)
static const uint8_t DP_VGA_DONGLE_BRANCH_DEV_NAME[] = "DpVga";
#include "link/link_dpms.h"
#include "dm_helpers.h"
+#define DC_LOGGER \
+ link->ctx->logger
#define DC_LOGGER_INIT(logger)
bool dp_parse_link_loss_status(
#include "dc/dc_dmub_srv.h"
#include "dce/dmub_replay.h"
#include "abm.h"
+#define DC_LOGGER \
+ link->ctx->logger
#define DC_LOGGER_INIT(logger)
#define DP_SINK_PR_ENABLE_AND_CONFIGURATION 0x37B
#include <asm/byteorder.h>
#include <drm/display/drm_dp_helper.h>
+#include <drm/drm_device.h>
#include <drm/drm_print.h>
#include "cgs_common.h"
#include "os_types.h"
-#define MAX_NAME_LEN 32
-
-#define DC_LOG_ERROR(...) DRM_ERROR(__VA_ARGS__)
-#define DC_LOG_WARNING(...) DRM_WARN(__VA_ARGS__)
-#define DC_LOG_DEBUG(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_DC(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_DTN(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_ERROR(...) drm_err((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_WARNING(...) drm_warn((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_DEBUG(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_DC(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
#define DC_LOG_SURFACE(...) pr_debug("[SURFACE]:"__VA_ARGS__)
-#define DC_LOG_CURSOR(...) pr_debug("[CURSOR]:"__VA_ARGS__)
-#define DC_LOG_PFLIP(...) pr_debug("[PFLIP]:"__VA_ARGS__)
-#define DC_LOG_VBLANK(...) pr_debug("[VBLANK]:"__VA_ARGS__)
-#define DC_LOG_HW_HOTPLUG(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_HW_HOTPLUG(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
#define DC_LOG_HW_LINK_TRAINING(...) pr_debug("[HW_LINK_TRAINING]:"__VA_ARGS__)
-#define DC_LOG_HW_SET_MODE(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_HW_RESUME_S3(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_HW_RESUME_S3(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
#define DC_LOG_HW_AUDIO(...) pr_debug("[HW_AUDIO]:"__VA_ARGS__)
-#define DC_LOG_HW_HPD_IRQ(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_MST(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_HW_HPD_IRQ(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_MST(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
#define DC_LOG_SCALER(...) pr_debug("[SCALER]:"__VA_ARGS__)
#define DC_LOG_BIOS(...) pr_debug("[BIOS]:"__VA_ARGS__)
#define DC_LOG_BANDWIDTH_CALCS(...) pr_debug("[BANDWIDTH_CALCS]:"__VA_ARGS__)
-#define DC_LOG_BANDWIDTH_VALIDATION(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_I2C_AUX(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_SYNC(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_BACKLIGHT(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_FEATURE_OVERRIDE(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_DETECTION_EDID_PARSER(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_DETECTION_DP_CAPS(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_RESOURCE(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_BANDWIDTH_VALIDATION(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_SYNC(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_BACKLIGHT(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_DETECTION_EDID_PARSER(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_DETECTION_DP_CAPS(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
#define DC_LOG_DML(...) pr_debug("[DML]:"__VA_ARGS__)
-#define DC_LOG_EVENT_MODE_SET(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_EVENT_DETECTION(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_EVENT_LINK_TRAINING(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_EVENT_LINK_LOSS(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_EVENT_UNDERFLOW(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_EVENT_MODE_SET(...) drm_dbg_kms((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_EVENT_DETECTION(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_EVENT_LINK_TRAINING(...) \
+ drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_EVENT_LINK_LOSS(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
#define DC_LOG_IF_TRACE(...) pr_debug("[IF_TRACE]:"__VA_ARGS__)
-#define DC_LOG_PERF_TRACE(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_RETIMER_REDRIVER(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_PERF_TRACE(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_RETIMER_REDRIVER(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
#define DC_LOG_GAMMA(...) pr_debug("[GAMMA]:"__VA_ARGS__)
#define DC_LOG_ALL_GAMMA(...) pr_debug("[GAMMA]:"__VA_ARGS__)
#define DC_LOG_ALL_TF_CHANNELS(...) pr_debug("[GAMMA]:"__VA_ARGS__)
-#define DC_LOG_DSC(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_DSC(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
#define DC_LOG_SMU(...) pr_debug("[SMU_MSG]:"__VA_ARGS__)
-#define DC_LOG_DWB(...) DRM_DEBUG_KMS(__VA_ARGS__)
-#define DC_LOG_DP2(...) DRM_DEBUG_KMS(__VA_ARGS__)
+#define DC_LOG_DWB(...) drm_dbg((DC_LOGGER)->dev, __VA_ARGS__)
+#define DC_LOG_DP2(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
#define DC_LOG_AUTO_DPM_TEST(...) pr_debug("[AutoDPMTest]: "__VA_ARGS__)
-struct dal_logger;
-
struct dc_log_buffer_ctx {
char *buf;
size_t pos;
size_t size;
};
-enum dc_log_type {
- LOG_ERROR = 0,
- LOG_WARNING,
- LOG_DEBUG,
- LOG_DC,
- LOG_DTN,
- LOG_SURFACE,
- LOG_HW_HOTPLUG,
- LOG_HW_LINK_TRAINING,
- LOG_HW_SET_MODE,
- LOG_HW_RESUME_S3,
- LOG_HW_AUDIO,
- LOG_HW_HPD_IRQ,
- LOG_MST,
- LOG_SCALER,
- LOG_BIOS,
- LOG_BANDWIDTH_CALCS,
- LOG_BANDWIDTH_VALIDATION,
- LOG_I2C_AUX,
- LOG_SYNC,
- LOG_BACKLIGHT,
- LOG_FEATURE_OVERRIDE,
- LOG_DETECTION_EDID_PARSER,
- LOG_DETECTION_DP_CAPS,
- LOG_RESOURCE,
- LOG_DML,
- LOG_EVENT_MODE_SET,
- LOG_EVENT_DETECTION,
- LOG_EVENT_LINK_TRAINING,
- LOG_EVENT_LINK_LOSS,
- LOG_EVENT_UNDERFLOW,
- LOG_IF_TRACE,
- LOG_PERF_TRACE,
- LOG_DISPLAYSTATS,
- LOG_HDMI_RETIMER_REDRIVER,
- LOG_DSC,
- LOG_SMU_MSG,
- LOG_DC2RESERVED4,
- LOG_DC2RESERVED5,
- LOG_DWB,
- LOG_GAMMA_DEBUG,
- LOG_MAX_HW_POINTS,
- LOG_ALL_TF_CHANNELS,
- LOG_SAMPLE_1DLUT,
- LOG_DP2,
- LOG_DC2RESERVED12,
- LOG_AUTO_DPM_TEST,
+struct dal_logger {
+ struct drm_device *dev;
};
-#define DC_MIN_LOG_MASK ((1 << LOG_ERROR) | \
- (1 << LOG_DETECTION_EDID_PARSER))
-
-#define DC_DEFAULT_LOG_MASK ((1ULL << LOG_ERROR) | \
- (1ULL << LOG_WARNING) | \
- (1ULL << LOG_EVENT_MODE_SET) | \
- (1ULL << LOG_EVENT_DETECTION) | \
- (1ULL << LOG_EVENT_LINK_TRAINING) | \
- (1ULL << LOG_EVENT_LINK_LOSS) | \
- (1ULL << LOG_EVENT_UNDERFLOW) | \
- (1ULL << LOG_RESOURCE) | \
- (1ULL << LOG_FEATURE_OVERRIDE) | \
- (1ULL << LOG_DETECTION_EDID_PARSER) | \
- (1ULL << LOG_DC) | \
- (1ULL << LOG_HW_HOTPLUG) | \
- (1ULL << LOG_HW_SET_MODE) | \
- (1ULL << LOG_HW_RESUME_S3) | \
- (1ULL << LOG_HW_HPD_IRQ) | \
- (1ULL << LOG_SYNC) | \
- (1ULL << LOG_BANDWIDTH_VALIDATION) | \
- (1ULL << LOG_MST) | \
- (1ULL << LOG_DETECTION_DP_CAPS) | \
- (1ULL << LOG_BACKLIGHT)) | \
- (1ULL << LOG_I2C_AUX) | \
- (1ULL << LOG_IF_TRACE) | \
- (1ULL << LOG_HDMI_FRL) | \
- (1ULL << LOG_SCALER) | \
- (1ULL << LOG_DTN) | \
- (1ULL << LOG_AUTO_DPM_TEST)/* | \
- (1ULL << LOG_DEBUG) | \
- (1ULL << LOG_BIOS) | \
- (1ULL << LOG_SURFACE) | \
- (1ULL << LOG_DML) | \
- (1ULL << LOG_HW_LINK_TRAINING) | \
- (1ULL << LOG_HW_AUDIO)| \
- (1ULL << LOG_BANDWIDTH_CALCS)*/
-
#endif /* __DAL_LOGGER_TYPES_H__ */
projects / linux-2.6-microblaze.git / commitdiff