powerpc/8xx: Move PPC_PIN_TLB options into 8xx Kconfig

PPC_PIN_TLB options are dedicated to the 8xx, move them into
the 8xx Kconfig.

While we are at it, add some text to explain what it does.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1ece39fac6312e1d14e6a67b3f9d9f9f91990a7b.1589866984.git.christophe.leroy@csgroup.eu

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 30e2111..1d4ef4f 100644 (file)
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1227,26 +1227,6 @@ config TASK_SIZE
        hex "Size of user task space" if TASK_SIZE_BOOL
        default "0x80000000" if PPC_8xx
        default "0xc0000000"
-
-config PIN_TLB
-       bool "Pinned Kernel TLBs (860 ONLY)"
-       depends on ADVANCED_OPTIONS && PPC_8xx && \
-                  !DEBUG_PAGEALLOC && !STRICT_KERNEL_RWX
-
-config PIN_TLB_DATA
-       bool "Pinned TLB for DATA"
-       depends on PIN_TLB
-       default y
-
-config PIN_TLB_IMMR
-       bool "Pinned TLB for IMMR"
-       depends on PIN_TLB || PPC_EARLY_DEBUG_CPM
-       default y
-
-config PIN_TLB_TEXT
-       bool "Pinned TLB for TEXT"
-       depends on PIN_TLB
-       default y
 endmenu
 
 if PPC64

diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index b37de62..0d036cd 100644 (file)
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -162,4 +162,45 @@ config UCODE_PATCH
        default y
        depends on !NO_UCODE_PATCH
 
+menu "8xx advanced setup"
+       depends on PPC_8xx
+
+config PIN_TLB
+       bool "Pinned Kernel TLBs"
+       depends on ADVANCED_OPTIONS && !DEBUG_PAGEALLOC && !STRICT_KERNEL_RWX
+       help
+         On the 8xx, we have 32 instruction TLBs and 32 data TLBs. In each
+         table 4 TLBs can be pinned.
+
+         It reduces the amount of usable TLBs to 28 (ie by 12%). That's the
+         reason why we make it selectable.
+
+         This option does nothing, it just activate the selection of what
+         to pin.
+
+config PIN_TLB_DATA
+       bool "Pinned TLB for DATA"
+       depends on PIN_TLB
+       default y
+       help
+         This pins the first 32 Mbytes of memory with 8M pages.
+
+config PIN_TLB_IMMR
+       bool "Pinned TLB for IMMR"
+       depends on PIN_TLB || PPC_EARLY_DEBUG_CPM
+       default y
+       help
+         This pins the IMMR area with a 512kbytes page. In case
+         CONFIG_PIN_TLB_DATA is also selected, it will reduce
+         CONFIG_PIN_TLB_DATA to 24 Mbytes.
+
+config PIN_TLB_TEXT
+       bool "Pinned TLB for TEXT"
+       depends on PIN_TLB
+       default y
+       help
+         This pins kernel text with 8M pages.
+
+endmenu
+
 endmenu