We want to unify the pinctrl-single pin group nodes to use naming "pins".
Otherwise non-standad pin group names will add make dtbs checks errors
when the pinctrl-single yaml binding gets merged.
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
};
&dra7_pmx_core {
- leds_pins_default: leds_pins_default {
+ leds_pins_default: leds-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x347c, PIN_OUTPUT | MUX_MODE14) /* gpmc_a15.gpio2_5 */
>;
};
- i2c1_pins_default: i2c1_pins_default {
+ i2c1_pins_default: i2c1-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
>;
};
- i2c3_pins_default: i2c3_pins_default {
+ i2c3_pins_default: i2c3-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
>;
};
- i2c4_pins_default: i2c4_pins_default {
+ i2c4_pins_default: i2c4-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x36ac, PIN_INPUT| MUX_MODE10) /* mcasp1_acl.i2c4_sda */
DRA7XX_CORE_IOPAD(0x36b0, PIN_INPUT| MUX_MODE10) /* mcasp1_fsr.i2c4_scl */
>;
};
- tps659038_pins_default: tps659038_pins_default {
+ tps659038_pins_default: tps659038-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
>;
};
- mmc2_pins_default: mmc2_pins_default {
+ mmc2_pins_default: mmc2-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- qspi1_pins: pinmux_qspi1_pins {
+ qspi1_pins: qspi1-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3474, PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
DRA7XX_CORE_IOPAD(0x3480, PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d0 */
>;
};
- cpsw_pins_default: cpsw_pins_default {
+ cpsw_pins_default: cpsw-default-pins {
pinctrl-single,pins = <
/* Slave at addr 0x0 */
DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tclk */
>;
};
- cpsw_pins_sleep: cpsw_pins_sleep {
+ cpsw_pins_sleep: cpsw-sleep-pins {
pinctrl-single,pins = <
/* Slave 1 */
DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15)
>;
};
- davinci_mdio_pins_default: davinci_mdio_pins_default {
+ davinci_mdio_pins_default: davinci-mdio-default-pins {
pinctrl-single,pins = <
/* MDIO */
DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */
>;
};
- davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
+ davinci_mdio_pins_sleep: davinci-mdio-sleep-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15)
DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15)
>;
};
- ads7846_pins: pinmux_ads7846_pins {
+ ads7846_pins: ads7846-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3464, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpmc_a9.gpio1_31 */
>;
};
- mcasp3_pins_default: mcasp3_pins_default {
+ mcasp3_pins_default: mcasp3-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
>;
};
- mcasp3_pins_sleep: mcasp3_pins_sleep {
+ mcasp3_pins_sleep: mcasp3-sleep-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15)
DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15)
};
&dra7_pmx_core {
- dcan1_pins_default: dcan1_pins_default {
+ dcan1_pins_default: dcan1-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0) /* dcan1_rx */
>;
};
- dcan1_pins_sleep: dcan1_pins_sleep {
+ dcan1_pins_sleep: dcan1-sleep-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */
};
&dra7_pmx_core {
- uart3_pins_default: uart3_pins_default {
+ uart3_pins_default: uart3-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
>;
};
- mmc1_pins_default: mmc1_pins_default {
+ mmc1_pins_default: mmc1-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- usb1_pins: pinmux_usb1_pins {
+ usb1_pins: usb1-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
>;
};
- i2c5_pins_default: i2c5_pins_default {
+ i2c5_pins_default: i2c5-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT| MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT| MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
>;
};
- lcd_pins_default: lcd_pins_default {
+ lcd_pins_default: lcd-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT | MUX_MODE14) /* vin2a_vsync0.gpio4_0 */
>;
};
- hdmi_pins: pinmux_hdmi_pins {
+ hdmi_pins: hdmi-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
>;
};
- hdmi_conn_pins: pinmux_hdmi_conn_pins {
+ hdmi_conn_pins: hdmi-conn-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT | MUX_MODE14) /* spi1_cs2.gpio7_12 */
>;
};
&dra7_pmx_core {
- dcan1_pins_default: dcan1_pins_default {
+ dcan1_pins_default: dcan1-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
>;
};
- dcan1_pins_sleep: dcan1_pins_sleep {
+ dcan1_pins_sleep: dcan1-sleep-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
*/
&dra7_pmx_core {
- mmc1_pins_default_no_clk_pu: mmc1_pins_default_no_clk_pu {
+ mmc1_pins_default_no_clk_pu: mmc1-default-no-clk-pu-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
};
&dra7_pmx_core {
- dcan1_pins_default: dcan1_pins_default {
+ dcan1_pins_default: dcan1-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
>;
};
- dcan1_pins_sleep: dcan1_pins_sleep {
+ dcan1_pins_sleep: dcan1-sleep-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
*/
&dra7_pmx_core {
- mmc1_pins_default: mmc1_pins_default {
+ mmc1_pins_default: mmc1-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_sdr12: mmc1_pins_sdr12 {
+ mmc1_pins_sdr12: mmc1-sdr12-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_hs: mmc1_pins_hs {
+ mmc1_pins_hs: mmc1-hs-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_sdr25: mmc1_pins_sdr25 {
+ mmc1_pins_sdr25: mmc1-sdr25-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_sdr50: mmc1_pins_sdr50 {
+ mmc1_pins_sdr50: mmc1-sdr50-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_ddr50_rev10: mmc1_pins_ddr50_rev10 {
+ mmc1_pins_ddr50_rev10: mmc1-ddr50-rev10-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_clk.mmc1_clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */
>;
};
- mmc1_pins_ddr50_rev20: mmc1_pins_ddr50_rev20 {
+ mmc1_pins_ddr50_rev20: mmc1-ddr50-rev20-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_sdr104: mmc1_pins_sdr104 {
+ mmc1_pins_sdr104: mmc1-sdr104-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc2_pins_default: mmc2_pins_default {
+ mmc2_pins_default: mmc2-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc2_pins_hs: mmc2_pins_hs {
+ mmc2_pins_hs: mmc2-hs-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc2_pins_ddr_rev10: mmc2_pins_ddr_rev10 {
+ mmc2_pins_ddr_rev10: mmc2-ddr-rev10-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
>;
};
- mmc2_pins_ddr_rev20: mmc2_pins_ddr_rev20 {
+ mmc2_pins_ddr_rev20: mmc2-ddr-rev20-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc2_pins_hs200: mmc2_pins_hs200 {
+ mmc2_pins_hs200: mmc2-hs200-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc4_pins_default: mmc4_pins_default {
+ mmc4_pins_default: mmc4-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
*/
&dra7_pmx_core {
- mmc1_pins_default: mmc1_pins_default {
+ mmc1_pins_default: mmc1-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_sdr12: mmc1_pins_sdr12 {
+ mmc1_pins_sdr12: mmc1-sdr12-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_hs: mmc1_pins_hs {
+ mmc1_pins_hs: mmc1-hs-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_sdr25: mmc1_pins_sdr25 {
+ mmc1_pins_sdr25: mmc1-sdr25-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_sdr50: mmc1_pins_sdr50 {
+ mmc1_pins_sdr50: mmc1-sdr50-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_ddr50: mmc1_pins_ddr50 {
+ mmc1_pins_ddr50: mmc1-ddr50-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_sdr104: mmc1_pins_sdr104 {
+ mmc1_pins_sdr104: mmc1-sdr104-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc2_pins_default: mmc2_pins_default {
+ mmc2_pins_default: mmc2-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc2_pins_hs: mmc2_pins_hs {
+ mmc2_pins_hs: mmc2-hs-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc2_pins_ddr_3_3v_rev11: mmc2_pins_ddr_3_3v_rev11 {
+ mmc2_pins_ddr_3_3v_rev11: mmc2-ddr-3-3v-rev11-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc2_pins_ddr_1_8v_rev11: mmc2_pins_ddr_1_8v_rev11 {
+ mmc2_pins_ddr_1_8v_rev11: mmc2-ddr-1-8v-rev11-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc2_pins_ddr_rev20: mmc2_pins_ddr_rev20 {
+ mmc2_pins_ddr_rev20: mmc2-ddr-rev20-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc2_pins_hs200: mmc2_pins_hs200 {
+ mmc2_pins_hs200: mmc2-hs200-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc4_pins_default: mmc4_pins_default {
+ mmc4_pins_default: mmc4-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
>;
};
- mmc4_pins_hs: mmc4_pins_hs {
+ mmc4_pins_hs: mmc4-hs-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
>;
};
- mmc3_pins_default: mmc3_pins_default {
+ mmc3_pins_default: mmc3-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
>;
};
- mmc3_pins_hs: mmc3_pins_hs {
+ mmc3_pins_hs: mmc3-hs-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
>;
};
- mmc3_pins_sdr12: mmc3_pins_sdr12 {
+ mmc3_pins_sdr12: mmc3-sdr12-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
>;
};
- mmc3_pins_sdr25: mmc3_pins_sdr25 {
+ mmc3_pins_sdr25: mmc3-sdr25-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
>;
};
- mmc3_pins_sdr50: mmc3_pins_sdr50 {
+ mmc3_pins_sdr50: mmc3-sdr50-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
>;
};
- mmc4_pins_sdr12: mmc4_pins_sdr12 {
+ mmc4_pins_sdr12: mmc4-sdr12-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
>;
};
- mmc4_pins_sdr25: mmc4_pins_sdr25 {
+ mmc4_pins_sdr25: mmc4-sdr25-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
*/
&dra7_pmx_core {
- mmc1_pins_default: mmc1_pins_default {
+ mmc1_pins_default: mmc1-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_hs: mmc1_pins_hs {
+ mmc1_pins_hs: mmc1-hs-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_sdr50: mmc1_pins_sdr50 {
+ mmc1_pins_sdr50: mmc1-sdr50-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc1_pins_ddr50: mmc1_pins_ddr50 {
+ mmc1_pins_ddr50: mmc1-ddr50-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */
>;
};
- mmc2_pins_default: mmc2_pins_default {
+ mmc2_pins_default: mmc2-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc2_pins_hs200: mmc2_pins_hs200 {
+ mmc2_pins_hs200: mmc2-hs200-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
>;
};
- mmc3_pins_default: mmc3_pins_default {
+ mmc3_pins_default: mmc3-default-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
>;
};
- mmc4_pins_hs: mmc4_pins_hs {
+ mmc4_pins_hs: mmc4-hs-pins {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */