earlyprintk=dbgp[debugController#]
earlyprintk=pciserial[,force],bus:device.function[,baudrate]
earlyprintk=xdbc[xhciController#]
+ earlyprintk=bios
earlyprintk is useful when the kernel crashes before
the normal console is initialized. It is not enabled by
The sclp output can only be used on s390.
+ The bios output can only be used on SuperH.
+
The optional "force" to "pciserial" enables use of a
PCI device even when its classcode is not of the
UART class.
Busses
======
-SuperHyway
-----------
-
-.. kernel-doc:: drivers/sh/superhyway/superhyway.c
- :export:
-
Maple
-----
config NO_IOPORT_MAP
def_bool !PCI
- depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \
- !SH_SOLUTION_ENGINE
+ depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE
config IO_TRAPPED
bool
bool "Support SH7760 processor"
select CPU_SH4
-config CPU_SUBTYPE_SH4_202
- bool "Support SH4-202 processor"
- select CPU_SH4
-
# SH-4A Processor Support
config CPU_SUBTYPE_SH7723
CPU_SUBTYPE_SH7263 || \
CPU_SUBTYPE_MXG
default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
- default "66000000" if CPU_SUBTYPE_SH4_202
default "50000000"
help
This option is used to specify the peripheral clock frequency.
menu "Bus options"
-config SUPERHYWAY
- tristate "SuperHyway Bus support"
- depends on CPU_SUBTYPE_SH4_202
-
config MAPLE
bool "Maple Bus support"
depends on SH_DREAMCAST
every function call and will therefore incur a major
performance hit. Most users should say N.
+config EARLY_PRINTK
+ bool "Early printk"
+ depends on SH_STANDARD_BIOS
+ help
+ Say Y here to redirect kernel printk messages to the serial port
+ used by the SH-IPL bootloader, starting very early in the boot
+ process and ending when the kernel's serial console is initialised.
+ This option is only useful while porting the kernel to a new machine,
+ when the kernel may crash or hang before the serial console is
+ initialised. If unsure, say N.
+
config 4KSTACKS
bool "Use 4Kb for kernel stacks instead of 8Kb"
depends on DEBUG_KERNEL && (MMU || BROKEN) && !PAGE_SIZE_64KB
Select if configuring for a Renesas EDOSK7760
evaluation board.
-config SH_SH4202_MICRODEV
- bool "SH4-202 MicroDev"
- depends on CPU_SUBTYPE_SH4_202
- help
- Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
- with an SH4-202 CPU.
-
config SH_LANDISK
bool "LANDISK"
depends on CPU_SUBTYPE_SH7751R
obj-$(CONFIG_SH_SDK7786) += mach-sdk7786/
obj-$(CONFIG_SH_X3PROTO) += mach-x3proto/
obj-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp/
-obj-$(CONFIG_SH_SH4202_MICRODEV)+= mach-microdev/
obj-$(CONFIG_SH_LANDISK) += mach-landisk/
obj-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2/
obj-$(CONFIG_SH_RSK) += mach-rsk/
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for the SuperH MicroDev specific parts of the kernel
-#
-
-obj-y := setup.o irq.o io.o fdc37c93xapm.o
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Setup for the SMSC FDC37C93xAPM
- *
- * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
- * Copyright (C) 2003, 2004 SuperH, Inc.
- * Copyright (C) 2004, 2005 Paul Mundt
- *
- * SuperH SH4-202 MicroDev board support.
- */
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/io.h>
-#include <linux/err.h>
-#include <mach/microdev.h>
-
-#define SMSC_CONFIG_PORT_ADDR (0x3F0)
-#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR
-#define SMSC_DATA_PORT_ADDR (SMSC_INDEX_PORT_ADDR + 1)
-
-#define SMSC_ENTER_CONFIG_KEY 0x55
-#define SMSC_EXIT_CONFIG_KEY 0xaa
-
-#define SMCS_LOGICAL_DEV_INDEX 0x07 /* Logical Device Number */
-#define SMSC_DEVICE_ID_INDEX 0x20 /* Device ID */
-#define SMSC_DEVICE_REV_INDEX 0x21 /* Device Revision */
-#define SMSC_ACTIVATE_INDEX 0x30 /* Activate */
-#define SMSC_PRIMARY_BASE_INDEX 0x60 /* Primary Base Address */
-#define SMSC_SECONDARY_BASE_INDEX 0x62 /* Secondary Base Address */
-#define SMSC_PRIMARY_INT_INDEX 0x70 /* Primary Interrupt Select */
-#define SMSC_SECONDARY_INT_INDEX 0x72 /* Secondary Interrupt Select */
-#define SMSC_HDCS0_INDEX 0xf0 /* HDCS0 Address Decoder */
-#define SMSC_HDCS1_INDEX 0xf1 /* HDCS1 Address Decoder */
-
-#define SMSC_IDE1_DEVICE 1 /* IDE #1 logical device */
-#define SMSC_IDE2_DEVICE 2 /* IDE #2 logical device */
-#define SMSC_PARALLEL_DEVICE 3 /* Parallel Port logical device */
-#define SMSC_SERIAL1_DEVICE 4 /* Serial #1 logical device */
-#define SMSC_SERIAL2_DEVICE 5 /* Serial #2 logical device */
-#define SMSC_KEYBOARD_DEVICE 7 /* Keyboard logical device */
-#define SMSC_CONFIG_REGISTERS 8 /* Configuration Registers (Aux I/O) */
-
-#define SMSC_READ_INDEXED(index) ({ \
- outb((index), SMSC_INDEX_PORT_ADDR); \
- inb(SMSC_DATA_PORT_ADDR); })
-#define SMSC_WRITE_INDEXED(val, index) ({ \
- outb((index), SMSC_INDEX_PORT_ADDR); \
- outb((val), SMSC_DATA_PORT_ADDR); })
-
-#define IDE1_PRIMARY_BASE 0x01f0 /* Task File Registe base for IDE #1 */
-#define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */
-#define IDE2_PRIMARY_BASE 0x0170 /* Task File Registe base for IDE #2 */
-#define IDE2_SECONDARY_BASE 0x0376 /* Miscellaneous AT registers for IDE #2 */
-
-#define SERIAL1_PRIMARY_BASE 0x03f8
-#define SERIAL2_PRIMARY_BASE 0x02f8
-
-#define MSB(x) ( (x) >> 8 )
-#define LSB(x) ( (x) & 0xff )
-
- /* General-Purpose base address on CPU-board FPGA */
-#define MICRODEV_FPGA_GP_BASE 0xa6100000ul
-
-static int __init smsc_superio_setup(void)
-{
-
- unsigned char devid, devrev;
-
- /* Initially the chip is in run state */
- /* Put it into configuration state */
- outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
-
- /* Read device ID info */
- devid = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
- devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
-
- if ((devid == 0x30) && (devrev == 0x01))
- printk("SMSC FDC37C93xAPM SuperIO device detected\n");
- else
- return -ENODEV;
-
- /* Select the keyboard device */
- SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
- /* enable it */
- SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
- /* enable the interrupts */
- SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX);
- SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX);
-
- /* Select the Serial #1 device */
- SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
- /* enable it */
- SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
- /* program with port addresses */
- SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
- SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
- SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
- /* enable the interrupts */
- SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX);
-
- /* Select the Serial #2 device */
- SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
- /* enable it */
- SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
- /* program with port addresses */
- SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
- SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
- SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
- /* enable the interrupts */
- SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX);
-
- /* Select the IDE#1 device */
- SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
- /* enable it */
- SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
- /* program with port addresses */
- SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
- SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
- SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
- SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
- SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX);
- SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX);
- /* select the interrupt */
- SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX);
-
- /* Select the IDE#2 device */
- SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
- /* enable it */
- SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
- /* program with port addresses */
- SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
- SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
- SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
- SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
- /* select the interrupt */
- SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX);
-
- /* Select the configuration registers */
- SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX);
- /* enable the appropriate GPIO pins for IDE functionality:
- * bit[0] In/Out 1==input; 0==output
- * bit[1] Polarity 1==invert; 0==no invert
- * bit[2] Int Enb #1 1==Enable Combined IRQ #1; 0==disable
- * bit[3:4] Function Select 00==original; 01==Alternate Function #1
- */
- SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
- SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
- SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
- SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
- SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */
-
- /* Exit the configuration state */
- outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
-
- return 0;
-}
-device_initcall(smsc_superio_setup);
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/sh/boards/superh/microdev/io.c
- *
- * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
- * Copyright (C) 2003, 2004 SuperH, Inc.
- * Copyright (C) 2004 Paul Mundt
- *
- * SuperH SH4-202 MicroDev board support.
- */
-
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/wait.h>
-#include <asm/io.h>
-#include <mach/microdev.h>
-
- /*
- * we need to have a 'safe' address to re-direct all I/O requests
- * that we do not explicitly wish to handle. This safe address
- * must have the following properies:
- *
- * * writes are ignored (no exception)
- * * reads are benign (no side-effects)
- * * accesses of width 1, 2 and 4-bytes are all valid.
- *
- * The Processor Version Register (PVR) has these properties.
- */
-#define PVR 0xff000030 /* Processor Version Register */
-
-
-#define IO_IDE2_BASE 0x170ul /* I/O base for SMSC FDC37C93xAPM IDE #2 */
-#define IO_IDE1_BASE 0x1f0ul /* I/O base for SMSC FDC37C93xAPM IDE #1 */
-#define IO_ISP1161_BASE 0x290ul /* I/O port for Philips ISP1161x USB chip */
-#define IO_SERIAL2_BASE 0x2f8ul /* I/O base for SMSC FDC37C93xAPM Serial #2 */
-#define IO_LAN91C111_BASE 0x300ul /* I/O base for SMSC LAN91C111 Ethernet chip */
-#define IO_IDE2_MISC 0x376ul /* I/O misc for SMSC FDC37C93xAPM IDE #2 */
-#define IO_SUPERIO_BASE 0x3f0ul /* I/O base for SMSC FDC37C93xAPM SuperIO chip */
-#define IO_IDE1_MISC 0x3f6ul /* I/O misc for SMSC FDC37C93xAPM IDE #1 */
-#define IO_SERIAL1_BASE 0x3f8ul /* I/O base for SMSC FDC37C93xAPM Serial #1 */
-
-#define IO_ISP1161_EXTENT 0x04ul /* I/O extent for Philips ISP1161x USB chip */
-#define IO_LAN91C111_EXTENT 0x10ul /* I/O extent for SMSC LAN91C111 Ethernet chip */
-#define IO_SUPERIO_EXTENT 0x02ul /* I/O extent for SMSC FDC37C93xAPM SuperIO chip */
-#define IO_IDE_EXTENT 0x08ul /* I/O extent for IDE Task Register set */
-#define IO_SERIAL_EXTENT 0x10ul
-
-#define IO_LAN91C111_PHYS 0xa7500000ul /* Physical address of SMSC LAN91C111 Ethernet chip */
-#define IO_ISP1161_PHYS 0xa7700000ul /* Physical address of Philips ISP1161x USB chip */
-#define IO_SUPERIO_PHYS 0xa7800000ul /* Physical address of SMSC FDC37C93xAPM SuperIO chip */
-
-/*
- * map I/O ports to memory-mapped addresses
- */
-void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len)
-{
- unsigned long result;
-
- if ((offset >= IO_LAN91C111_BASE) &&
- (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) {
- /*
- * SMSC LAN91C111 Ethernet chip
- */
- result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE;
- } else if ((offset >= IO_SUPERIO_BASE) &&
- (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) {
- /*
- * SMSC FDC37C93xAPM SuperIO chip
- *
- * Configuration Registers
- */
- result = IO_SUPERIO_PHYS + (offset << 1);
- } else if (((offset >= IO_IDE1_BASE) &&
- (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) ||
- (offset == IO_IDE1_MISC)) {
- /*
- * SMSC FDC37C93xAPM SuperIO chip
- *
- * IDE #1
- */
- result = IO_SUPERIO_PHYS + (offset << 1);
- } else if (((offset >= IO_IDE2_BASE) &&
- (offset < IO_IDE2_BASE + IO_IDE_EXTENT)) ||
- (offset == IO_IDE2_MISC)) {
- /*
- * SMSC FDC37C93xAPM SuperIO chip
- *
- * IDE #2
- */
- result = IO_SUPERIO_PHYS + (offset << 1);
- } else if ((offset >= IO_SERIAL1_BASE) &&
- (offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) {
- /*
- * SMSC FDC37C93xAPM SuperIO chip
- *
- * Serial #1
- */
- result = IO_SUPERIO_PHYS + (offset << 1);
- } else if ((offset >= IO_SERIAL2_BASE) &&
- (offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) {
- /*
- * SMSC FDC37C93xAPM SuperIO chip
- *
- * Serial #2
- */
- result = IO_SUPERIO_PHYS + (offset << 1);
- } else if ((offset >= IO_ISP1161_BASE) &&
- (offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) {
- /*
- * Philips USB ISP1161x chip
- */
- result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE;
- } else {
- /*
- * safe default.
- */
- printk("Warning: unexpected port in %s( offset = 0x%lx )\n",
- __func__, offset);
- result = PVR;
- }
-
- return (void __iomem *)result;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/sh/boards/superh/microdev/irq.c
- *
- * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
- *
- * SuperH SH4-202 MicroDev board support.
- */
-
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <asm/io.h>
-#include <mach/microdev.h>
-
-#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */
-
-static const struct {
- unsigned char fpgaIrq;
- unsigned char mapped;
- const char *name;
-} fpgaIrqTable[NUM_EXTERNAL_IRQS] = {
- { 0, 0, "unused" }, /* IRQ #0 IRL=15 0x200 */
- { MICRODEV_FPGA_IRQ_KEYBOARD, 1, "keyboard" }, /* IRQ #1 IRL=14 0x220 */
- { MICRODEV_FPGA_IRQ_SERIAL1, 1, "Serial #1"}, /* IRQ #2 IRL=13 0x240 */
- { MICRODEV_FPGA_IRQ_ETHERNET, 1, "Ethernet" }, /* IRQ #3 IRL=12 0x260 */
- { MICRODEV_FPGA_IRQ_SERIAL2, 0, "Serial #2"}, /* IRQ #4 IRL=11 0x280 */
- { 0, 0, "unused" }, /* IRQ #5 IRL=10 0x2a0 */
- { 0, 0, "unused" }, /* IRQ #6 IRL=9 0x2c0 */
- { MICRODEV_FPGA_IRQ_USB_HC, 1, "USB" }, /* IRQ #7 IRL=8 0x2e0 */
- { MICRODEV_IRQ_PCI_INTA, 1, "PCI INTA" }, /* IRQ #8 IRL=7 0x300 */
- { MICRODEV_IRQ_PCI_INTB, 1, "PCI INTB" }, /* IRQ #9 IRL=6 0x320 */
- { MICRODEV_IRQ_PCI_INTC, 1, "PCI INTC" }, /* IRQ #10 IRL=5 0x340 */
- { MICRODEV_IRQ_PCI_INTD, 1, "PCI INTD" }, /* IRQ #11 IRL=4 0x360 */
- { MICRODEV_FPGA_IRQ_MOUSE, 1, "mouse" }, /* IRQ #12 IRL=3 0x380 */
- { MICRODEV_FPGA_IRQ_IDE2, 1, "IDE #2" }, /* IRQ #13 IRL=2 0x3a0 */
- { MICRODEV_FPGA_IRQ_IDE1, 1, "IDE #1" }, /* IRQ #14 IRL=1 0x3c0 */
- { 0, 0, "unused" }, /* IRQ #15 IRL=0 0x3e0 */
-};
-
-#if (MICRODEV_LINUX_IRQ_KEYBOARD != 1)
-# error Inconsistancy in defining the IRQ# for Keyboard!
-#endif
-
-#if (MICRODEV_LINUX_IRQ_ETHERNET != 3)
-# error Inconsistancy in defining the IRQ# for Ethernet!
-#endif
-
-#if (MICRODEV_LINUX_IRQ_USB_HC != 7)
-# error Inconsistancy in defining the IRQ# for USB!
-#endif
-
-#if (MICRODEV_LINUX_IRQ_MOUSE != 12)
-# error Inconsistancy in defining the IRQ# for PS/2 Mouse!
-#endif
-
-#if (MICRODEV_LINUX_IRQ_IDE2 != 13)
-# error Inconsistancy in defining the IRQ# for secondary IDE!
-#endif
-
-#if (MICRODEV_LINUX_IRQ_IDE1 != 14)
-# error Inconsistancy in defining the IRQ# for primary IDE!
-#endif
-
-static void disable_microdev_irq(struct irq_data *data)
-{
- unsigned int irq = data->irq;
- unsigned int fpgaIrq;
-
- if (irq >= NUM_EXTERNAL_IRQS)
- return;
- if (!fpgaIrqTable[irq].mapped)
- return;
-
- fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
-
- /* disable interrupts on the FPGA INTC register */
- __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
-}
-
-static void enable_microdev_irq(struct irq_data *data)
-{
- unsigned int irq = data->irq;
- unsigned long priorityReg, priorities, pri;
- unsigned int fpgaIrq;
-
- if (unlikely(irq >= NUM_EXTERNAL_IRQS))
- return;
- if (unlikely(!fpgaIrqTable[irq].mapped))
- return;
-
- pri = 15 - irq;
-
- fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
- priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
-
- /* set priority for the interrupt */
- priorities = __raw_readl(priorityReg);
- priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
- priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
- __raw_writel(priorities, priorityReg);
-
- /* enable interrupts on the FPGA INTC register */
- __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
-}
-
-static struct irq_chip microdev_irq_type = {
- .name = "MicroDev-IRQ",
- .irq_unmask = enable_microdev_irq,
- .irq_mask = disable_microdev_irq,
-};
-
-/* This function sets the desired irq handler to be a MicroDev type */
-static void __init make_microdev_irq(unsigned int irq)
-{
- disable_irq_nosync(irq);
- irq_set_chip_and_handler(irq, µdev_irq_type, handle_level_irq);
- disable_microdev_irq(irq_get_irq_data(irq));
-}
-
-extern void __init init_microdev_irq(void)
-{
- int i;
-
- /* disable interrupts on the FPGA INTC register */
- __raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG);
-
- for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
- make_microdev_irq(i);
-}
-
-extern void microdev_print_fpga_intc_status(void)
-{
- volatile unsigned int * const intenb = (unsigned int*)MICRODEV_FPGA_INTENB_REG;
- volatile unsigned int * const intdsb = (unsigned int*)MICRODEV_FPGA_INTDSB_REG;
- volatile unsigned int * const intpria = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(0);
- volatile unsigned int * const intprib = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(8);
- volatile unsigned int * const intpric = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(16);
- volatile unsigned int * const intprid = (unsigned int*)MICRODEV_FPGA_INTPRI_REG(24);
- volatile unsigned int * const intsrc = (unsigned int*)MICRODEV_FPGA_INTSRC_REG;
- volatile unsigned int * const intreq = (unsigned int*)MICRODEV_FPGA_INTREQ_REG;
-
- printk("-------------------------- microdev_print_fpga_intc_status() ------------------\n");
- printk("FPGA_INTENB = 0x%08x\n", *intenb);
- printk("FPGA_INTDSB = 0x%08x\n", *intdsb);
- printk("FPGA_INTSRC = 0x%08x\n", *intsrc);
- printk("FPGA_INTREQ = 0x%08x\n", *intreq);
- printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria);
- printk("-------------------------------------------------------------------------------\n");
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/sh/boards/superh/microdev/setup.c
- *
- * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
- * Copyright (C) 2003, 2004 SuperH, Inc.
- * Copyright (C) 2004, 2005 Paul Mundt
- *
- * SuperH SH4-202 MicroDev board support.
- */
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ioport.h>
-#include <video/s1d13xxxfb.h>
-#include <mach/microdev.h>
-#include <asm/io.h>
-#include <asm/machvec.h>
-#include <linux/sizes.h>
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = 0x300,
- .end = 0x300 + SZ_4K - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = MICRODEV_LINUX_IRQ_ETHERNET,
- .end = MICRODEV_LINUX_IRQ_ETHERNET,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = -1,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static struct s1d13xxxfb_regval s1d13806_initregs[] = {
- { S1DREG_MISC, 0x00 },
- { S1DREG_COM_DISP_MODE, 0x00 },
- { S1DREG_GPIO_CNF0, 0x00 },
- { S1DREG_GPIO_CNF1, 0x00 },
- { S1DREG_GPIO_CTL0, 0x00 },
- { S1DREG_GPIO_CTL1, 0x00 },
- { S1DREG_CLK_CNF, 0x02 },
- { S1DREG_LCD_CLK_CNF, 0x01 },
- { S1DREG_CRT_CLK_CNF, 0x03 },
- { S1DREG_MPLUG_CLK_CNF, 0x03 },
- { S1DREG_CPU2MEM_WST_SEL, 0x02 },
- { S1DREG_SDRAM_REF_RATE, 0x03 },
- { S1DREG_SDRAM_TC0, 0x00 },
- { S1DREG_SDRAM_TC1, 0x01 },
- { S1DREG_MEM_CNF, 0x80 },
- { S1DREG_PANEL_TYPE, 0x25 },
- { S1DREG_MOD_RATE, 0x00 },
- { S1DREG_LCD_DISP_HWIDTH, 0x63 },
- { S1DREG_LCD_NDISP_HPER, 0x1e },
- { S1DREG_TFT_FPLINE_START, 0x06 },
- { S1DREG_TFT_FPLINE_PWIDTH, 0x03 },
- { S1DREG_LCD_DISP_VHEIGHT0, 0x57 },
- { S1DREG_LCD_DISP_VHEIGHT1, 0x02 },
- { S1DREG_LCD_NDISP_VPER, 0x00 },
- { S1DREG_TFT_FPFRAME_START, 0x0a },
- { S1DREG_TFT_FPFRAME_PWIDTH, 0x81 },
- { S1DREG_LCD_DISP_MODE, 0x03 },
- { S1DREG_LCD_MISC, 0x00 },
- { S1DREG_LCD_DISP_START0, 0x00 },
- { S1DREG_LCD_DISP_START1, 0x00 },
- { S1DREG_LCD_DISP_START2, 0x00 },
- { S1DREG_LCD_MEM_OFF0, 0x90 },
- { S1DREG_LCD_MEM_OFF1, 0x01 },
- { S1DREG_LCD_PIX_PAN, 0x00 },
- { S1DREG_LCD_DISP_FIFO_HTC, 0x00 },
- { S1DREG_LCD_DISP_FIFO_LTC, 0x00 },
- { S1DREG_CRT_DISP_HWIDTH, 0x63 },
- { S1DREG_CRT_NDISP_HPER, 0x1f },
- { S1DREG_CRT_HRTC_START, 0x04 },
- { S1DREG_CRT_HRTC_PWIDTH, 0x8f },
- { S1DREG_CRT_DISP_VHEIGHT0, 0x57 },
- { S1DREG_CRT_DISP_VHEIGHT1, 0x02 },
- { S1DREG_CRT_NDISP_VPER, 0x1b },
- { S1DREG_CRT_VRTC_START, 0x00 },
- { S1DREG_CRT_VRTC_PWIDTH, 0x83 },
- { S1DREG_TV_OUT_CTL, 0x10 },
- { S1DREG_CRT_DISP_MODE, 0x05 },
- { S1DREG_CRT_DISP_START0, 0x00 },
- { S1DREG_CRT_DISP_START1, 0x00 },
- { S1DREG_CRT_DISP_START2, 0x00 },
- { S1DREG_CRT_MEM_OFF0, 0x20 },
- { S1DREG_CRT_MEM_OFF1, 0x03 },
- { S1DREG_CRT_PIX_PAN, 0x00 },
- { S1DREG_CRT_DISP_FIFO_HTC, 0x00 },
- { S1DREG_CRT_DISP_FIFO_LTC, 0x00 },
- { S1DREG_LCD_CUR_CTL, 0x00 },
- { S1DREG_LCD_CUR_START, 0x01 },
- { S1DREG_LCD_CUR_XPOS0, 0x00 },
- { S1DREG_LCD_CUR_XPOS1, 0x00 },
- { S1DREG_LCD_CUR_YPOS0, 0x00 },
- { S1DREG_LCD_CUR_YPOS1, 0x00 },
- { S1DREG_LCD_CUR_BCTL0, 0x00 },
- { S1DREG_LCD_CUR_GCTL0, 0x00 },
- { S1DREG_LCD_CUR_RCTL0, 0x00 },
- { S1DREG_LCD_CUR_BCTL1, 0x1f },
- { S1DREG_LCD_CUR_GCTL1, 0x3f },
- { S1DREG_LCD_CUR_RCTL1, 0x1f },
- { S1DREG_LCD_CUR_FIFO_HTC, 0x00 },
- { S1DREG_CRT_CUR_CTL, 0x00 },
- { S1DREG_CRT_CUR_START, 0x01 },
- { S1DREG_CRT_CUR_XPOS0, 0x00 },
- { S1DREG_CRT_CUR_XPOS1, 0x00 },
- { S1DREG_CRT_CUR_YPOS0, 0x00 },
- { S1DREG_CRT_CUR_YPOS1, 0x00 },
- { S1DREG_CRT_CUR_BCTL0, 0x00 },
- { S1DREG_CRT_CUR_GCTL0, 0x00 },
- { S1DREG_CRT_CUR_RCTL0, 0x00 },
- { S1DREG_CRT_CUR_BCTL1, 0x1f },
- { S1DREG_CRT_CUR_GCTL1, 0x3f },
- { S1DREG_CRT_CUR_RCTL1, 0x1f },
- { S1DREG_CRT_CUR_FIFO_HTC, 0x00 },
- { S1DREG_BBLT_CTL0, 0x00 },
- { S1DREG_BBLT_CTL1, 0x00 },
- { S1DREG_BBLT_CC_EXP, 0x00 },
- { S1DREG_BBLT_OP, 0x00 },
- { S1DREG_BBLT_SRC_START0, 0x00 },
- { S1DREG_BBLT_SRC_START1, 0x00 },
- { S1DREG_BBLT_SRC_START2, 0x00 },
- { S1DREG_BBLT_DST_START0, 0x00 },
- { S1DREG_BBLT_DST_START1, 0x00 },
- { S1DREG_BBLT_DST_START2, 0x00 },
- { S1DREG_BBLT_MEM_OFF0, 0x00 },
- { S1DREG_BBLT_MEM_OFF1, 0x00 },
- { S1DREG_BBLT_WIDTH0, 0x00 },
- { S1DREG_BBLT_WIDTH1, 0x00 },
- { S1DREG_BBLT_HEIGHT0, 0x00 },
- { S1DREG_BBLT_HEIGHT1, 0x00 },
- { S1DREG_BBLT_BGC0, 0x00 },
- { S1DREG_BBLT_BGC1, 0x00 },
- { S1DREG_BBLT_FGC0, 0x00 },
- { S1DREG_BBLT_FGC1, 0x00 },
- { S1DREG_LKUP_MODE, 0x00 },
- { S1DREG_LKUP_ADDR, 0x00 },
- { S1DREG_PS_CNF, 0x10 },
- { S1DREG_PS_STATUS, 0x00 },
- { S1DREG_CPU2MEM_WDOGT, 0x00 },
- { S1DREG_COM_DISP_MODE, 0x02 },
-};
-
-static struct s1d13xxxfb_pdata s1d13806_platform_data = {
- .initregs = s1d13806_initregs,
- .initregssize = ARRAY_SIZE(s1d13806_initregs),
-};
-
-static struct resource s1d13806_resources[] = {
- [0] = {
- .start = 0x07200000,
- .end = 0x07200000 + SZ_2M - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0x07000000,
- .end = 0x07000000 + SZ_2M - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device s1d13806_device = {
- .name = "s1d13806fb",
- .id = -1,
- .num_resources = ARRAY_SIZE(s1d13806_resources),
- .resource = s1d13806_resources,
-
- .dev = {
- .platform_data = &s1d13806_platform_data,
- },
-};
-
-static struct platform_device *microdev_devices[] __initdata = {
- &smc91x_device,
- &s1d13806_device,
-};
-
-static int __init microdev_devices_setup(void)
-{
- return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices));
-}
-device_initcall(microdev_devices_setup);
-
-/*
- * The Machine Vector
- */
-static struct sh_machine_vector mv_sh4202_microdev __initmv = {
- .mv_name = "SH4-202 MicroDev",
- .mv_ioport_map = microdev_ioport_map,
- .mv_init_irq = init_microdev_irq,
-};
+++ /dev/null
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_CPU_SUBTYPE_SH4_202=y
-CONFIG_FLATMEM_MANUAL=y
-CONFIG_SH_SH4202_MICRODEV=y
-CONFIG_SH_DMA=y
-CONFIG_SH_DMA_API=y
-CONFIG_HEARTBEAT=y
-CONFIG_PREEMPT=y
-CONFIG_CMDLINE_OVERWRITE=y
-CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/hda1"
-CONFIG_SUPERHYWAY=y
-CONFIG_NET=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-# CONFIG_IPV6 is not set
-# CONFIG_FW_LOADER is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_SH_SCI=y
-CONFIG_SERIAL_SH_SCI_CONSOLE=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_VFAT_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_HUGETLBFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_CRYPTO_ECB=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
obj-y += dma/ platform_early.o
obj-$(CONFIG_PCI) += pci/
-obj-$(CONFIG_SUPERHYWAY) += superhyway/
obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
obj-$(CONFIG_HEARTBEAT) += heartbeat.o
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for the SuperHyway specific kernel interface routines under Linux.
-#
-
-obj-$(CONFIG_CPU_SUBTYPE_SH4_202) += ops-sh4-202.o
-
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/sh/drivers/superhyway/ops-sh4-202.c
- *
- * SuperHyway bus support for SH4-202
- *
- * Copyright (C) 2005 Paul Mundt
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/superhyway.h>
-#include <linux/string.h>
-#include <asm/addrspace.h>
-#include <asm/io.h>
-
-#define PHYS_EMI_CBLOCK P4SEGADDR(0x1ec00000)
-#define PHYS_EMI_DBLOCK P4SEGADDR(0x08000000)
-#define PHYS_FEMI_CBLOCK P4SEGADDR(0x1f800000)
-#define PHYS_FEMI_DBLOCK P4SEGADDR(0x00000000)
-
-#define PHYS_EPBR_BLOCK P4SEGADDR(0x1de00000)
-#define PHYS_DMAC_BLOCK P4SEGADDR(0x1fa00000)
-#define PHYS_PBR_BLOCK P4SEGADDR(0x1fc00000)
-
-static struct resource emi_resources[] = {
- [0] = {
- .start = PHYS_EMI_CBLOCK,
- .end = PHYS_EMI_CBLOCK + 0x00300000 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = PHYS_EMI_DBLOCK,
- .end = PHYS_EMI_DBLOCK + 0x08000000 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct superhyway_device emi_device = {
- .name = "emi",
- .num_resources = ARRAY_SIZE(emi_resources),
- .resource = emi_resources,
-};
-
-static struct resource femi_resources[] = {
- [0] = {
- .start = PHYS_FEMI_CBLOCK,
- .end = PHYS_FEMI_CBLOCK + 0x00100000 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = PHYS_FEMI_DBLOCK,
- .end = PHYS_FEMI_DBLOCK + 0x08000000 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct superhyway_device femi_device = {
- .name = "femi",
- .num_resources = ARRAY_SIZE(femi_resources),
- .resource = femi_resources,
-};
-
-static struct resource epbr_resources[] = {
- [0] = {
- .start = P4SEGADDR(0x1e7ffff8),
- .end = P4SEGADDR(0x1e7ffff8 + (sizeof(u32) * 2) - 1),
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = PHYS_EPBR_BLOCK,
- .end = PHYS_EPBR_BLOCK + 0x00a00000 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct superhyway_device epbr_device = {
- .name = "epbr",
- .num_resources = ARRAY_SIZE(epbr_resources),
- .resource = epbr_resources,
-};
-
-static struct resource dmac_resource = {
- .start = PHYS_DMAC_BLOCK,
- .end = PHYS_DMAC_BLOCK + 0x00100000 - 1,
- .flags = IORESOURCE_MEM,
-};
-
-static struct superhyway_device dmac_device = {
- .name = "dmac",
- .num_resources = 1,
- .resource = &dmac_resource,
-};
-
-static struct resource pbr_resources[] = {
- [0] = {
- .start = P4SEGADDR(0x1ffffff8),
- .end = P4SEGADDR(0x1ffffff8 + (sizeof(u32) * 2) - 1),
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = PHYS_PBR_BLOCK,
- .end = PHYS_PBR_BLOCK + 0x00400000 - (sizeof(u32) * 2) - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct superhyway_device pbr_device = {
- .name = "pbr",
- .num_resources = ARRAY_SIZE(pbr_resources),
- .resource = pbr_resources,
-};
-
-static struct superhyway_device *sh4202_devices[] __initdata = {
- &emi_device, &femi_device, &epbr_device, &dmac_device, &pbr_device,
-};
-
-static int sh4202_read_vcr(unsigned long base, struct superhyway_vcr_info *vcr)
-{
- u32 vcrh, vcrl;
- u64 tmp;
-
- /*
- * XXX: Even though the SH4-202 Evaluation Device documentation
- * indicates that VCRL is mapped first with VCRH at a + 0x04
- * offset, the opposite seems to be true.
- *
- * Some modules (PBR and ePBR for instance) also appear to have
- * VCRL/VCRH flipped in the documentation, but on the SH4-202
- * itself it appears that these are all consistently mapped with
- * VCRH preceding VCRL.
- *
- * Do not trust the documentation, for it is evil.
- */
- vcrh = __raw_readl(base);
- vcrl = __raw_readl(base + sizeof(u32));
-
- tmp = ((u64)vcrh << 32) | vcrl;
- memcpy(vcr, &tmp, sizeof(u64));
-
- return 0;
-}
-
-static int sh4202_write_vcr(unsigned long base, struct superhyway_vcr_info vcr)
-{
- u64 tmp = *(u64 *)&vcr;
-
- __raw_writel((tmp >> 32) & 0xffffffff, base);
- __raw_writel(tmp & 0xffffffff, base + sizeof(u32));
-
- return 0;
-}
-
-static struct superhyway_ops sh4202_superhyway_ops = {
- .read_vcr = sh4202_read_vcr,
- .write_vcr = sh4202_write_vcr,
-};
-
-struct superhyway_bus superhyway_channels[] = {
- { &sh4202_superhyway_ops, },
- { 0, },
-};
-
-int __init superhyway_scan_bus(struct superhyway_bus *bus)
-{
- return superhyway_add_devices(bus, sh4202_devices,
- ARRAY_SIZE(sh4202_devices));
-}
-
(unsigned long)_n_, sizeof(*(ptr))); \
})
+#include <asm-generic/cmpxchg-local.h>
+
+#define arch_cmpxchg_local(ptr, o, n) ({ \
+ (__typeof__(*ptr))__generic_cmpxchg_local((ptr), \
+ (unsigned long)(o), \
+ (unsigned long)(n), \
+ sizeof(*(ptr))); \
+})
+
#endif /* __ASM_SH_CMPXCHG_H */
{ \
volatile type *__addr; \
\
- __addr = __ioport_map(port, sizeof(type)); \
+ __addr = (void __iomem *)sh_io_port_base + port; \
*__addr = val; \
slow; \
} \
volatile type *__addr; \
type __val; \
\
- __addr = __ioport_map(port, sizeof(type)); \
+ __addr = (void __iomem *)sh_io_port_base + port; \
__val = *__addr; \
slow; \
\
int (*mv_irq_demux)(int irq);
void (*mv_init_irq)(void);
-#ifdef CONFIG_HAS_IOPORT_MAP
- void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size);
- void (*mv_ioport_unmap)(void __iomem *);
-#endif
-
int (*mv_clk_init)(void);
int (*mv_mode_pins)(void);
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0
- *
- * linux/include/asm-sh/microdev.h
- *
- * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
- *
- * Definitions for the SuperH SH4-202 MicroDev board.
- */
-#ifndef __ASM_SH_MICRODEV_H
-#define __ASM_SH_MICRODEV_H
-
-extern void init_microdev_irq(void);
-extern void microdev_print_fpga_intc_status(void);
-
-/*
- * The following are useful macros for manipulating the interrupt
- * controller (INTC) on the CPU-board FPGA. should be noted that there
- * is an INTC on the FPGA, and a separate INTC on the SH4-202 core -
- * these are two different things, both of which need to be prorammed to
- * correctly route - unfortunately, they have the same name and
- * abbreviations!
- */
-#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */
-#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */
-#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */
-#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */
-#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */
-#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */
-#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */
-#define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */
-#define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */
-
-
-/*
- * The following are the IRQ numbers for the Linux Kernel for external
- * interrupts. i.e. the numbers seen by 'cat /proc/interrupt'.
- */
-#define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */
-#define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */
-#define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */
-#define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */
-#define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */
-#define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */
-#define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */
-#define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */
-
-/*
- * The following are the IRQ numbers for the INTC on the FPGA for
- * external interrupts. i.e. the bits in the INTC registers in the
- * FPGA.
- */
-#define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */
-#define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */
-#define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */
-#define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */
-#define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */
-#define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */
-#define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */
-#define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */
-
-#define MICRODEV_IRQ_PCI_INTA 8
-#define MICRODEV_IRQ_PCI_INTB 9
-#define MICRODEV_IRQ_PCI_INTC 10
-#define MICRODEV_IRQ_PCI_INTD 11
-
-#define __IO_PREFIX microdev
-#include <asm/io_generic.h>
-
-#endif /* __ASM_SH_MICRODEV_H */
obj-$(CONFIG_CPU_SUBTYPE_SH7751) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7760) += setup-sh7760.o
-obj-$(CONFIG_CPU_SUBTYPE_SH4_202) += setup-sh4-202.o
# Primary on-chip clocks (common)
ifndef CONFIG_CPU_SH4A
clock-$(CONFIG_CPU_SH4) := clock-sh4.o
endif
-# Additional clocks by subtype
-clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o
-
obj-y += $(clock-y)
obj-$(CONFIG_PERF_EVENTS) += $(perf-y)
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/sh/kernel/cpu/sh4/clock-sh4-202.c
- *
- * Additional SH4-202 support for the clock framework
- *
- * Copyright (C) 2005 Paul Mundt
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/clkdev.h>
-#include <asm/clock.h>
-#include <asm/freq.h>
-
-#define CPG2_FRQCR3 0xfe0a0018
-
-static int frqcr3_divisors[] = { 1, 2, 3, 4, 6, 8, 16 };
-static int frqcr3_values[] = { 0, 1, 2, 3, 4, 5, 6 };
-
-static unsigned long emi_clk_recalc(struct clk *clk)
-{
- int idx = __raw_readl(CPG2_FRQCR3) & 0x0007;
- return clk->parent->rate / frqcr3_divisors[idx];
-}
-
-static inline int frqcr3_lookup(struct clk *clk, unsigned long rate)
-{
- int divisor = clk->parent->rate / rate;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++)
- if (frqcr3_divisors[i] == divisor)
- return frqcr3_values[i];
-
- /* Safe fallback */
- return 5;
-}
-
-static struct sh_clk_ops sh4202_emi_clk_ops = {
- .recalc = emi_clk_recalc,
-};
-
-static struct clk sh4202_emi_clk = {
- .flags = CLK_ENABLE_ON_INIT,
- .ops = &sh4202_emi_clk_ops,
-};
-
-static unsigned long femi_clk_recalc(struct clk *clk)
-{
- int idx = (__raw_readl(CPG2_FRQCR3) >> 3) & 0x0007;
- return clk->parent->rate / frqcr3_divisors[idx];
-}
-
-static struct sh_clk_ops sh4202_femi_clk_ops = {
- .recalc = femi_clk_recalc,
-};
-
-static struct clk sh4202_femi_clk = {
- .flags = CLK_ENABLE_ON_INIT,
- .ops = &sh4202_femi_clk_ops,
-};
-
-static void shoc_clk_init(struct clk *clk)
-{
- int i;
-
- /*
- * For some reason, the shoc_clk seems to be set to some really
- * insane value at boot (values outside of the allowable frequency
- * range for instance). We deal with this by scaling it back down
- * to something sensible just in case.
- *
- * Start scaling from the high end down until we find something
- * that passes rate verification..
- */
- for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) {
- int divisor = frqcr3_divisors[i];
-
- if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0)
- break;
- }
-
- WARN_ON(i == ARRAY_SIZE(frqcr3_divisors)); /* Undefined clock */
-}
-
-static unsigned long shoc_clk_recalc(struct clk *clk)
-{
- int idx = (__raw_readl(CPG2_FRQCR3) >> 6) & 0x0007;
- return clk->parent->rate / frqcr3_divisors[idx];
-}
-
-static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate)
-{
- struct clk *bclk = clk_get(NULL, "bus_clk");
- unsigned long bclk_rate = clk_get_rate(bclk);
-
- clk_put(bclk);
-
- if (rate > bclk_rate)
- return 1;
- if (rate > 66000000)
- return 1;
-
- return 0;
-}
-
-static int shoc_clk_set_rate(struct clk *clk, unsigned long rate)
-{
- unsigned long frqcr3;
- unsigned int tmp;
-
- /* Make sure we have something sensible to switch to */
- if (shoc_clk_verify_rate(clk, rate) != 0)
- return -EINVAL;
-
- tmp = frqcr3_lookup(clk, rate);
-
- frqcr3 = __raw_readl(CPG2_FRQCR3);
- frqcr3 &= ~(0x0007 << 6);
- frqcr3 |= tmp << 6;
- __raw_writel(frqcr3, CPG2_FRQCR3);
-
- clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
-
- return 0;
-}
-
-static struct sh_clk_ops sh4202_shoc_clk_ops = {
- .init = shoc_clk_init,
- .recalc = shoc_clk_recalc,
- .set_rate = shoc_clk_set_rate,
-};
-
-static struct clk sh4202_shoc_clk = {
- .flags = CLK_ENABLE_ON_INIT,
- .ops = &sh4202_shoc_clk_ops,
-};
-
-static struct clk *sh4202_onchip_clocks[] = {
- &sh4202_emi_clk,
- &sh4202_femi_clk,
- &sh4202_shoc_clk,
-};
-
-static struct clk_lookup lookups[] = {
- /* main clocks */
- CLKDEV_CON_ID("emi_clk", &sh4202_emi_clk),
- CLKDEV_CON_ID("femi_clk", &sh4202_femi_clk),
- CLKDEV_CON_ID("shoc_clk", &sh4202_shoc_clk),
-};
-
-int __init arch_clk_init(void)
-{
- struct clk *clk;
- int i, ret = 0;
-
- cpg_clk_init();
-
- clk = clk_get(NULL, "master_clk");
- for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) {
- struct clk *clkp = sh4202_onchip_clocks[i];
-
- clkp->parent = clk;
- ret |= clk_register(clkp);
- }
-
- clk_put(clk);
-
- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
- return ret;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SH4-202 Setup
- *
- * Copyright (C) 2006 Paul Mundt
- * Copyright (C) 2009 Magnus Damm
- */
-#include <linux/platform_device.h>
-#include <linux/init.h>
-#include <linux/serial.h>
-#include <linux/serial_sci.h>
-#include <linux/sh_timer.h>
-#include <linux/sh_intc.h>
-#include <linux/io.h>
-#include <asm/platform_early.h>
-
-static struct plat_sci_port scif0_platform_data = {
- .scscr = SCSCR_REIE,
- .type = PORT_SCIF,
-};
-
-static struct resource scif0_resources[] = {
- DEFINE_RES_MEM(0xffe80000, 0x100),
- DEFINE_RES_IRQ(evt2irq(0x700)),
- DEFINE_RES_IRQ(evt2irq(0x720)),
- DEFINE_RES_IRQ(evt2irq(0x760)),
- DEFINE_RES_IRQ(evt2irq(0x740)),
-};
-
-static struct platform_device scif0_device = {
- .name = "sh-sci",
- .id = 0,
- .resource = scif0_resources,
- .num_resources = ARRAY_SIZE(scif0_resources),
- .dev = {
- .platform_data = &scif0_platform_data,
- },
-};
-
-static struct sh_timer_config tmu0_platform_data = {
- .channels_mask = 7,
-};
-
-static struct resource tmu0_resources[] = {
- DEFINE_RES_MEM(0xffd80000, 0x30),
- DEFINE_RES_IRQ(evt2irq(0x400)),
- DEFINE_RES_IRQ(evt2irq(0x420)),
- DEFINE_RES_IRQ(evt2irq(0x440)),
-};
-
-static struct platform_device tmu0_device = {
- .name = "sh-tmu",
- .id = 0,
- .dev = {
- .platform_data = &tmu0_platform_data,
- },
- .resource = tmu0_resources,
- .num_resources = ARRAY_SIZE(tmu0_resources),
-};
-
-static struct platform_device *sh4202_devices[] __initdata = {
- &scif0_device,
- &tmu0_device,
-};
-
-static int __init sh4202_devices_setup(void)
-{
- return platform_add_devices(sh4202_devices,
- ARRAY_SIZE(sh4202_devices));
-}
-arch_initcall(sh4202_devices_setup);
-
-static struct platform_device *sh4202_early_devices[] __initdata = {
- &scif0_device,
- &tmu0_device,
-};
-
-void __init plat_early_device_setup(void)
-{
- sh_early_platform_add_devices(sh4202_early_devices,
- ARRAY_SIZE(sh4202_early_devices));
-}
-
-enum {
- UNUSED = 0,
-
- /* interrupt sources */
- IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */
- HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT,
-};
-
-static struct intc_vect vectors[] __initdata = {
- INTC_VECT(HUDI, 0x600),
- INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
- INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
- INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
- INTC_VECT(RTC, 0x4c0),
- INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720),
- INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760),
- INTC_VECT(WDT, 0x560),
-};
-
-static struct intc_prio_reg prio_registers[] __initdata = {
- { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
- { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } },
- { 0xffd0000c, 0, 16, 4, /* IPRC */ { 0, 0, SCIF, HUDI } },
- { 0xffd00010, 0, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } },
-};
-
-static DECLARE_INTC_DESC(intc_desc, "sh4-202", vectors, NULL,
- NULL, prio_registers, NULL);
-
-static struct intc_vect vectors_irlm[] __initdata = {
- INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
- INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360),
-};
-
-static DECLARE_INTC_DESC(intc_desc_irlm, "sh4-202_irlm", vectors_irlm, NULL,
- NULL, prio_registers, NULL);
-
-void __init plat_irq_setup(void)
-{
- register_intc_controller(&intc_desc);
-}
-
-#define INTC_ICR 0xffd00000UL
-#define INTC_ICR_IRLM (1<<7)
-
-void __init plat_irq_setup_pins(int mode)
-{
- switch (mode) {
- case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
- __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
- register_intc_controller(&intc_desc_irlm);
- break;
- default:
- BUG();
- }
-}
unsigned long sh_io_port_base __read_mostly = -1;
EXPORT_SYMBOL(sh_io_port_base);
-void __iomem *__ioport_map(unsigned long addr, unsigned int size)
-{
- if (sh_mv.mv_ioport_map)
- return sh_mv.mv_ioport_map(addr, size);
-
- return (void __iomem *)(addr + sh_io_port_base);
-}
-EXPORT_SYMBOL(__ioport_map);
-
void __iomem *ioport_map(unsigned long port, unsigned int nr)
{
void __iomem *ret;
if (ret)
return ret;
- return __ioport_map(port, nr);
+ return (void __iomem *)(port + sh_io_port_base);
}
EXPORT_SYMBOL(ioport_map);
void ioport_unmap(void __iomem *addr)
{
- if (sh_mv.mv_ioport_unmap)
- sh_mv.mv_ioport_unmap(addr);
}
EXPORT_SYMBOL(ioport_unmap);
(lp)->cfg.pxa_u16_align4)
-#elif defined(CONFIG_SH_SH4202_MICRODEV)
-
-#define SMC_CAN_USE_8BIT 0
-#define SMC_CAN_USE_16BIT 1
-#define SMC_CAN_USE_32BIT 0
-
-#define SMC_inb(a, r) inb((a) + (r) - 0xa0000000)
-#define SMC_inw(a, r) inw((a) + (r) - 0xa0000000)
-#define SMC_inl(a, r) inl((a) + (r) - 0xa0000000)
-#define SMC_outb(v, a, r) outb(v, (a) + (r) - 0xa0000000)
-#define SMC_outw(lp, v, a, r) outw(v, (a) + (r) - 0xa0000000)
-#define SMC_outl(v, a, r) outl(v, (a) + (r) - 0xa0000000)
-#define SMC_insl(a, r, p, l) insl((a) + (r) - 0xa0000000, p, l)
-#define SMC_outsl(a, r, p, l) outsl((a) + (r) - 0xa0000000, p, l)
-#define SMC_insw(a, r, p, l) insw((a) + (r) - 0xa0000000, p, l)
-#define SMC_outsw(a, r, p, l) outsw((a) + (r) - 0xa0000000, p, l)
-
-#define SMC_IRQ_FLAGS (0)
-
#elif defined(CONFIG_ATARI)
#define SMC_CAN_USE_8BIT 1
obj-$(CONFIG_HAVE_CLK) += clk/
endif
obj-$(CONFIG_MAPLE) += maple/
-obj-$(CONFIG_SUPERHYWAY) += superhyway/
obj-y += pm_runtime.o
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for the SuperHyway bus drivers.
-#
-
-obj-$(CONFIG_SUPERHYWAY) += superhyway.o
-obj-$(CONFIG_SYSFS) += superhyway-sysfs.o
-
+++ /dev/null
-/*
- * drivers/sh/superhyway/superhyway-sysfs.c
- *
- * SuperHyway Bus sysfs interface
- *
- * Copyright (C) 2004, 2005 Paul Mundt <lethal@linux-sh.org>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/types.h>
-#include <linux/superhyway.h>
-
-#define superhyway_ro_attr(name, fmt, field) \
-static ssize_t name##_show(struct device *dev, struct device_attribute *attr, char *buf) \
-{ \
- struct superhyway_device *s = to_superhyway_device(dev); \
- return sprintf(buf, fmt, s->field); \
-} \
-static DEVICE_ATTR_RO(name);
-
-/* VCR flags */
-superhyway_ro_attr(perr_flags, "0x%02x\n", vcr.perr_flags);
-superhyway_ro_attr(merr_flags, "0x%02x\n", vcr.merr_flags);
-superhyway_ro_attr(mod_vers, "0x%04x\n", vcr.mod_vers);
-superhyway_ro_attr(mod_id, "0x%04x\n", vcr.mod_id);
-superhyway_ro_attr(bot_mb, "0x%02x\n", vcr.bot_mb);
-superhyway_ro_attr(top_mb, "0x%02x\n", vcr.top_mb);
-
-/* Misc */
-superhyway_ro_attr(resource, "0x%08lx\n", resource[0].start);
-
-static struct attribute *superhyway_dev_attrs[] = {
- &dev_attr_perr_flags.attr,
- &dev_attr_merr_flags.attr,
- &dev_attr_mod_vers.attr,
- &dev_attr_mod_id.attr,
- &dev_attr_bot_mb.attr,
- &dev_attr_top_mb.attr,
- &dev_attr_resource.attr,
- NULL,
-};
-
-static const struct attribute_group superhyway_dev_group = {
- .attrs = superhyway_dev_attrs,
-};
-
-const struct attribute_group *superhyway_dev_groups[] = {
- &superhyway_dev_group,
- NULL,
-};
+++ /dev/null
-/*
- * drivers/sh/superhyway/superhyway.c
- *
- * SuperHyway Bus Driver
- *
- * Copyright (C) 2004, 2005 Paul Mundt <lethal@linux-sh.org>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/list.h>
-#include <linux/superhyway.h>
-#include <linux/string.h>
-#include <linux/slab.h>
-
-static int superhyway_devices;
-
-static struct device superhyway_bus_device = {
- .init_name = "superhyway",
-};
-
-static void superhyway_device_release(struct device *dev)
-{
- struct superhyway_device *sdev = to_superhyway_device(dev);
-
- kfree(sdev->resource);
- kfree(sdev);
-}
-
-/**
- * superhyway_add_device - Add a SuperHyway module
- * @base: Physical address where module is mapped.
- * @sdev: SuperHyway device to add, or NULL to allocate a new one.
- * @bus: Bus where SuperHyway module resides.
- *
- * This is responsible for adding a new SuperHyway module. This sets up a new
- * struct superhyway_device for the module being added if @sdev == NULL.
- *
- * Devices are initially added in the order that they are scanned (from the
- * top-down of the memory map), and are assigned an ID based on the order that
- * they are added. Any manual addition of a module will thus get the ID after
- * the devices already discovered regardless of where it resides in memory.
- *
- * Further work can and should be done in superhyway_scan_bus(), to be sure
- * that any new modules are properly discovered and subsequently registered.
- */
-int superhyway_add_device(unsigned long base, struct superhyway_device *sdev,
- struct superhyway_bus *bus)
-{
- struct superhyway_device *dev = sdev;
-
- if (!dev) {
- dev = kzalloc(sizeof(struct superhyway_device), GFP_KERNEL);
- if (!dev)
- return -ENOMEM;
-
- }
-
- dev->bus = bus;
- superhyway_read_vcr(dev, base, &dev->vcr);
-
- if (!dev->resource) {
- dev->resource = kzalloc(sizeof(struct resource), GFP_KERNEL);
- if (!dev->resource) {
- kfree(dev);
- return -ENOMEM;
- }
-
- dev->resource->name = dev->name;
- dev->resource->start = base;
- dev->resource->end = dev->resource->start + 0x01000000;
- }
-
- dev->dev.parent = &superhyway_bus_device;
- dev->dev.bus = &superhyway_bus_type;
- dev->dev.release = superhyway_device_release;
- dev->id.id = dev->vcr.mod_id;
-
- sprintf(dev->name, "SuperHyway device %04x", dev->id.id);
- dev_set_name(&dev->dev, "%02x", superhyway_devices);
-
- superhyway_devices++;
-
- return device_register(&dev->dev);
-}
-
-int superhyway_add_devices(struct superhyway_bus *bus,
- struct superhyway_device **devices,
- int nr_devices)
-{
- int i, ret = 0;
-
- for (i = 0; i < nr_devices; i++) {
- struct superhyway_device *dev = devices[i];
- ret |= superhyway_add_device(dev->resource[0].start, dev, bus);
- }
-
- return ret;
-}
-
-static int __init superhyway_init(void)
-{
- struct superhyway_bus *bus;
- int ret;
-
- ret = device_register(&superhyway_bus_device);
- if (unlikely(ret))
- return ret;
-
- for (bus = superhyway_channels; bus->ops; bus++)
- ret |= superhyway_scan_bus(bus);
-
- return ret;
-}
-postcore_initcall(superhyway_init);
-
-static const struct superhyway_device_id *
-superhyway_match_id(const struct superhyway_device_id *ids,
- struct superhyway_device *dev)
-{
- while (ids->id) {
- if (ids->id == dev->id.id)
- return ids;
-
- ids++;
- }
-
- return NULL;
-}
-
-static int superhyway_device_probe(struct device *dev)
-{
- struct superhyway_device *shyway_dev = to_superhyway_device(dev);
- struct superhyway_driver *shyway_drv = to_superhyway_driver(dev->driver);
-
- if (shyway_drv && shyway_drv->probe) {
- const struct superhyway_device_id *id;
-
- id = superhyway_match_id(shyway_drv->id_table, shyway_dev);
- if (id)
- return shyway_drv->probe(shyway_dev, id);
- }
-
- return -ENODEV;
-}
-
-static void superhyway_device_remove(struct device *dev)
-{
- struct superhyway_device *shyway_dev = to_superhyway_device(dev);
- struct superhyway_driver *shyway_drv = to_superhyway_driver(dev->driver);
-
- if (shyway_drv->remove)
- shyway_drv->remove(shyway_dev);
-}
-
-/**
- * superhyway_register_driver - Register a new SuperHyway driver
- * @drv: SuperHyway driver to register.
- *
- * This registers the passed in @drv. Any devices matching the id table will
- * automatically be populated and handed off to the driver's specified probe
- * routine.
- */
-int superhyway_register_driver(struct superhyway_driver *drv)
-{
- drv->drv.name = drv->name;
- drv->drv.bus = &superhyway_bus_type;
-
- return driver_register(&drv->drv);
-}
-
-/**
- * superhyway_unregister_driver - Unregister a SuperHyway driver
- * @drv: SuperHyway driver to unregister.
- *
- * This cleans up after superhyway_register_driver(), and should be invoked in
- * the exit path of any module drivers.
- */
-void superhyway_unregister_driver(struct superhyway_driver *drv)
-{
- driver_unregister(&drv->drv);
-}
-
-static int superhyway_bus_match(struct device *dev, struct device_driver *drv)
-{
- struct superhyway_device *shyway_dev = to_superhyway_device(dev);
- struct superhyway_driver *shyway_drv = to_superhyway_driver(drv);
- const struct superhyway_device_id *ids = shyway_drv->id_table;
-
- if (!ids)
- return -EINVAL;
- if (superhyway_match_id(ids, shyway_dev))
- return 1;
-
- return -ENODEV;
-}
-
-struct bus_type superhyway_bus_type = {
- .name = "superhyway",
- .match = superhyway_bus_match,
-#ifdef CONFIG_SYSFS
- .dev_groups = superhyway_dev_groups,
-#endif
- .probe = superhyway_device_probe,
- .remove = superhyway_device_remove,
-};
-
-static int __init superhyway_bus_init(void)
-{
- return bus_register(&superhyway_bus_type);
-}
-
-static void __exit superhyway_bus_exit(void)
-{
- device_unregister(&superhyway_bus_device);
- bus_unregister(&superhyway_bus_type);
-}
-
-core_initcall(superhyway_bus_init);
-module_exit(superhyway_bus_exit);
-
-EXPORT_SYMBOL(superhyway_bus_type);
-EXPORT_SYMBOL(superhyway_add_device);
-EXPORT_SYMBOL(superhyway_add_devices);
-EXPORT_SYMBOL(superhyway_register_driver);
-EXPORT_SYMBOL(superhyway_unregister_driver);
-
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * include/linux/superhyway.h
- *
- * SuperHyway Bus definitions
- *
- * Copyright (C) 2004, 2005 Paul Mundt <lethal@linux-sh.org>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __LINUX_SUPERHYWAY_H
-#define __LINUX_SUPERHYWAY_H
-
-#include <linux/device.h>
-
-/*
- * SuperHyway IDs
- */
-#define SUPERHYWAY_DEVICE_ID_SH5_DMAC 0x0183
-
-struct superhyway_vcr_info {
- u8 perr_flags; /* P-port Error flags */
- u8 merr_flags; /* Module Error flags */
- u16 mod_vers; /* Module Version */
- u16 mod_id; /* Module ID */
- u8 bot_mb; /* Bottom Memory block */
- u8 top_mb; /* Top Memory block */
-};
-
-struct superhyway_ops {
- int (*read_vcr)(unsigned long base, struct superhyway_vcr_info *vcr);
- int (*write_vcr)(unsigned long base, struct superhyway_vcr_info vcr);
-};
-
-struct superhyway_bus {
- struct superhyway_ops *ops;
-};
-
-extern struct superhyway_bus superhyway_channels[];
-
-struct superhyway_device_id {
- unsigned int id;
- unsigned long driver_data;
-};
-
-struct superhyway_device;
-extern struct bus_type superhyway_bus_type;
-
-struct superhyway_driver {
- char *name;
-
- const struct superhyway_device_id *id_table;
- struct device_driver drv;
-
- int (*probe)(struct superhyway_device *dev, const struct superhyway_device_id *id);
- void (*remove)(struct superhyway_device *dev);
-};
-
-#define to_superhyway_driver(d) container_of((d), struct superhyway_driver, drv)
-
-struct superhyway_device {
- char name[32];
-
- struct device dev;
-
- struct superhyway_device_id id;
- struct superhyway_driver *drv;
- struct superhyway_bus *bus;
-
- int num_resources;
- struct resource *resource;
- struct superhyway_vcr_info vcr;
-};
-
-#define to_superhyway_device(d) container_of((d), struct superhyway_device, dev)
-
-#define superhyway_get_drvdata(d) dev_get_drvdata(&(d)->dev)
-#define superhyway_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, (p))
-
-static inline int
-superhyway_read_vcr(struct superhyway_device *dev, unsigned long base,
- struct superhyway_vcr_info *vcr)
-{
- return dev->bus->ops->read_vcr(base, vcr);
-}
-
-static inline int
-superhyway_write_vcr(struct superhyway_device *dev, unsigned long base,
- struct superhyway_vcr_info vcr)
-{
- return dev->bus->ops->write_vcr(base, vcr);
-}
-
-extern int superhyway_scan_bus(struct superhyway_bus *);
-
-/* drivers/sh/superhyway/superhyway.c */
-int superhyway_register_driver(struct superhyway_driver *);
-void superhyway_unregister_driver(struct superhyway_driver *);
-int superhyway_add_device(unsigned long base, struct superhyway_device *, struct superhyway_bus *);
-int superhyway_add_devices(struct superhyway_bus *bus, struct superhyway_device **devices, int nr_devices);
-
-/* drivers/sh/superhyway/superhyway-sysfs.c */
-extern const struct attribute_group *superhyway_dev_groups[];
-
-#endif /* __LINUX_SUPERHYWAY_H */
-
projects / linux-2.6-microblaze.git / commitdiff