wifi: rtw89: 8852c: add quirk to set PCI BER for certain platforms
authorPing-Ke Shih <pkshih@realtek.com>
Fri, 29 Mar 2024 01:52:50 +0000 (09:52 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Wed, 3 Apr 2024 02:41:55 +0000 (10:41 +0800)
Increase PCI BER (bit error rate) count depth setting which could increase
PHY circuit fault tolerance and improve compatibility.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240329015251.22762-4-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.c
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/pci.c
drivers/net/wireless/realtek/rtw89/pci.h
drivers/net/wireless/realtek/rtw89/rtw8851be.c
drivers/net/wireless/realtek/rtw89/rtw8852ae.c
drivers/net/wireless/realtek/rtw89/rtw8852be.c
drivers/net/wireless/realtek/rtw89/rtw8852ce.c
drivers/net/wireless/realtek/rtw89/rtw8922ae.c

index 1de40fa..52588f0 100644 (file)
@@ -4069,6 +4069,24 @@ void rtw89_core_ntfy_btc_event(struct rtw89_dev *rtwdev, enum rtw89_btc_hmsg eve
        }
 }
 
+void rtw89_check_quirks(struct rtw89_dev *rtwdev, const struct dmi_system_id *quirks)
+{
+       const struct dmi_system_id *match;
+       enum rtw89_quirks quirk;
+
+       if (!quirks)
+               return;
+
+       for (match = dmi_first_match(quirks); match; match = dmi_first_match(match + 1)) {
+               quirk = (uintptr_t)match->driver_data;
+               if (quirk >= NUM_OF_RTW89_QUIRKS)
+                       continue;
+
+               set_bit(quirk, rtwdev->quirks);
+       }
+}
+EXPORT_SYMBOL(rtw89_check_quirks);
+
 int rtw89_core_start(struct rtw89_dev *rtwdev)
 {
        int ret;
index 12133bc..2cc8785 100644 (file)
@@ -7,6 +7,7 @@
 
 #include <linux/average.h>
 #include <linux/bitfield.h>
+#include <linux/dmi.h>
 #include <linux/firmware.h>
 #include <linux/iopoll.h>
 #include <linux/workqueue.h>
@@ -4080,6 +4081,7 @@ union rtw89_bus_info {
 
 struct rtw89_driver_info {
        const struct rtw89_chip_info *chip;
+       const struct dmi_system_id *quirks;
        union rtw89_bus_info bus;
 };
 
@@ -4427,6 +4429,12 @@ enum rtw89_flags {
        NUM_OF_RTW89_FLAGS,
 };
 
+enum rtw89_quirks {
+       RTW89_QUIRK_PCI_BER,
+
+       NUM_OF_RTW89_QUIRKS,
+};
+
 enum rtw89_pkt_drop_sel {
        RTW89_PKT_DROP_SEL_MACID_BE_ONCE,
        RTW89_PKT_DROP_SEL_MACID_BK_ONCE,
@@ -5187,6 +5195,7 @@ struct rtw89_dev {
        DECLARE_BITMAP(mac_id_map, RTW89_MAX_MAC_ID_NUM);
        DECLARE_BITMAP(flags, NUM_OF_RTW89_FLAGS);
        DECLARE_BITMAP(pkt_offload, RTW89_MAX_PKT_OFLD_NUM);
+       DECLARE_BITMAP(quirks, NUM_OF_RTW89_QUIRKS);
 
        struct rtw89_phy_stat phystat;
        struct rtw89_rfk_wait_info rfk_wait;
@@ -6232,6 +6241,7 @@ int rtw89_core_sta_remove(struct rtw89_dev *rtwdev,
 void rtw89_core_set_tid_config(struct rtw89_dev *rtwdev,
                               struct ieee80211_sta *sta,
                               struct cfg80211_tid_config *tid_config);
+void rtw89_check_quirks(struct rtw89_dev *rtwdev, const struct dmi_system_id *quirks);
 int rtw89_core_init(struct rtw89_dev *rtwdev);
 void rtw89_core_deinit(struct rtw89_dev *rtwdev);
 int rtw89_core_register(struct rtw89_dev *rtwdev);
index 1900113..46e24b3 100644 (file)
@@ -2298,6 +2298,22 @@ static int rtw89_pci_deglitch_setting(struct rtw89_dev *rtwdev)
        return 0;
 }
 
+static void rtw89_pci_ber(struct rtw89_dev *rtwdev)
+{
+       u32 phy_offset;
+
+       if (!test_bit(RTW89_QUIRK_PCI_BER, rtwdev->quirks))
+               return;
+
+       phy_offset = R_RAC_DIRECT_OFFSET_G1;
+       rtw89_write16(rtwdev, phy_offset + RAC_ANA1E * RAC_MULT, RAC_ANA1E_G1_VAL);
+       rtw89_write16(rtwdev, phy_offset + RAC_ANA2E * RAC_MULT, RAC_ANA2E_VAL);
+
+       phy_offset = R_RAC_DIRECT_OFFSET_G2;
+       rtw89_write16(rtwdev, phy_offset + RAC_ANA1E * RAC_MULT, RAC_ANA1E_G2_VAL);
+       rtw89_write16(rtwdev, phy_offset + RAC_ANA2E * RAC_MULT, RAC_ANA2E_VAL);
+}
+
 static void rtw89_pci_rxdma_prefth(struct rtw89_dev *rtwdev)
 {
        if (rtwdev->chip->chip_id != RTL8852A)
@@ -2695,6 +2711,7 @@ static int rtw89_pci_ops_mac_pre_init_ax(struct rtw89_dev *rtwdev)
        const struct rtw89_pci_info *info = rtwdev->pci_info;
        int ret;
 
+       rtw89_pci_ber(rtwdev);
        rtw89_pci_rxdma_prefth(rtwdev);
        rtw89_pci_l1off_pwroff(rtwdev);
        rtw89_pci_deglitch_setting(rtwdev);
@@ -4171,6 +4188,8 @@ int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
        rtwdev->hci.rpwm_addr = pci_info->rpwm_addr;
        rtwdev->hci.cpwm_addr = pci_info->cpwm_addr;
 
+       rtw89_check_quirks(rtwdev, info->quirks);
+
        SET_IEEE80211_DEV(rtwdev->hw, &pdev->dev);
 
        ret = rtw89_core_init(rtwdev);
index a63b6b7..87e7081 100644 (file)
 #define RAC_REG_FLD_0                  0x1D
 #define BAC_AUTOK_N_MASK               GENMASK(3, 2)
 #define PCIE_AUTOK_4                   0x3
+#define RAC_ANA1E                      0x1E
+#define RAC_ANA1E_G1_VAL               0x66EA
+#define RAC_ANA1E_G2_VAL               0x6EEA
 #define RAC_ANA1F                      0x1F
 #define RAC_ANA24                      0x24
 #define B_AX_DEGLITCH                  GENMASK(11, 8)
 #define RAC_ANA26                      0x26
 #define B_AX_RXEN                      GENMASK(15, 14)
+#define RAC_ANA2E                      0x2E
+#define RAC_ANA2E_VAL                  0xFFFE
 #define RAC_CTRL_PPR_V1                        0x30
 #define B_AX_CLK_CALIB_EN              BIT(12)
 #define B_AX_CALIB_EN                  BIT(13)
index ca1374a..ec3629d 100644 (file)
@@ -63,6 +63,7 @@ static const struct rtw89_pci_info rtw8851b_pci_info = {
 
 static const struct rtw89_driver_info rtw89_8851be_info = {
        .chip = &rtw8851b_chip_info,
+       .quirks = NULL,
        .bus = {
                .pci = &rtw8851b_pci_info,
        },
index 7c6ffed..fdee5dd 100644 (file)
@@ -61,6 +61,7 @@ static const struct rtw89_pci_info rtw8852a_pci_info = {
 
 static const struct rtw89_driver_info rtw89_8852ae_info = {
        .chip = &rtw8852a_chip_info,
+       .quirks = NULL,
        .bus = {
                .pci = &rtw8852a_pci_info,
        },
index ed71364..5f94112 100644 (file)
@@ -63,6 +63,7 @@ static const struct rtw89_pci_info rtw8852b_pci_info = {
 
 static const struct rtw89_driver_info rtw89_8852be_info = {
        .chip = &rtw8852b_chip_info,
+       .quirks = NULL,
        .bus = {
                .pci = &rtw8852b_pci_info,
        },
index 583ea67..e07c7f3 100644 (file)
@@ -68,8 +68,31 @@ static const struct rtw89_pci_info rtw8852c_pci_info = {
        .recognize_intrs        = rtw89_pci_recognize_intrs_v1,
 };
 
+static const struct dmi_system_id rtw8852c_pci_quirks[] = {
+       {
+               .ident = "Dell Inc. Vostro 16 5640",
+               .matches = {
+                       DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+                       DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 16 5640"),
+                       DMI_MATCH(DMI_PRODUCT_SKU, "0CA0"),
+               },
+               .driver_data = (void *)RTW89_QUIRK_PCI_BER,
+       },
+       {
+               .ident = "Dell Inc. Inspiron 16 5640",
+               .matches = {
+                       DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+                       DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 16 5640"),
+                       DMI_MATCH(DMI_PRODUCT_SKU, "0C9F"),
+               },
+               .driver_data = (void *)RTW89_QUIRK_PCI_BER,
+       },
+       {},
+};
+
 static const struct rtw89_driver_info rtw89_8852ce_info = {
        .chip = &rtw8852c_chip_info,
+       .quirks = rtw8852c_pci_quirks,
        .bus = {
                .pci = &rtw8852c_pci_info,
        },
index 4981b65..ce8aaa9 100644 (file)
@@ -61,6 +61,7 @@ static const struct rtw89_pci_info rtw8922a_pci_info = {
 
 static const struct rtw89_driver_info rtw89_8922ae_info = {
        .chip = &rtw8922a_chip_info,
+       .quirks = NULL,
        .bus = {
                .pci = &rtw8922a_pci_info,
        },