mmc: sdhci-esdhc-imx: fix esdhc_change_pinstate() to allow default state restore

esdhc_change_pinstate() checks for pins_100mhz and pins_200mhz at the
top of the function and returns -EINVAL if either is not defined. This
prevents the default case from ever being reached, which means devices
with a sleep pinctrl state but without high-speed pin states (100mhz/
200mhz) can never restore their default pin configuration.

Move the IS_ERR checks for pins_100mhz and pins_200mhz into their
respective switch cases.

Fixes: 676a83855614 ("mmc: host: sdhci-esdhc-imx: refactor the system PM logic")
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulfh@kernel.org>

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 7230d70..ead4685 100644 (file)
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -1326,19 +1326,21 @@ static int esdhc_change_pinstate(struct sdhci_host *host,
 
        dev_dbg(mmc_dev(host->mmc), "change pinctrl state for uhs %d\n", uhs);
 
-       if (IS_ERR(imx_data->pinctrl) ||
-               IS_ERR(imx_data->pins_100mhz) ||
-               IS_ERR(imx_data->pins_200mhz))
+       if (IS_ERR(imx_data->pinctrl))
                return -EINVAL;
 
        switch (uhs) {
        case MMC_TIMING_UHS_SDR50:
        case MMC_TIMING_UHS_DDR50:
+               if (IS_ERR(imx_data->pins_100mhz))
+                       return -EINVAL;
                pinctrl = imx_data->pins_100mhz;
                break;
        case MMC_TIMING_UHS_SDR104:
        case MMC_TIMING_MMC_HS200:
        case MMC_TIMING_MMC_HS400:
+               if (IS_ERR(imx_data->pins_200mhz))
+                       return -EINVAL;
                pinctrl = imx_data->pins_200mhz;
                break;
        default: