drm/i915/cdclk: abstract intel_cdclk_logical()

Add intel_cdclk_logical() helper to avoid looking at struct
intel_cdclk_state internals outside of intel_cdclk.c.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/e965667550e82307341d6abbeedc67b93cae9fc6.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
index 989a917..927fe56 100644 (file)
--- a/drivers/gpu/drm/i915/display/hsw_ips.c
+++ b/drivers/gpu/drm/i915/display/hsw_ips.c
@@ -265,7 +265,7 @@ int hsw_ips_compute_config(struct intel_atomic_state *state,
                        return PTR_ERR(cdclk_state);
 
                /* pixel rate mustn't exceed 95% of cdclk with IPS on BDW */
-               if (crtc_state->pixel_rate > cdclk_state->logical.cdclk * 95 / 100)
+               if (crtc_state->pixel_rate > intel_cdclk_logical(cdclk_state) * 95 / 100)
                        return 0;
        }
 

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 95fab2e..51485c7 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3834,3 +3834,8 @@ void intel_init_cdclk_hooks(struct intel_display *display)
                     "Unknown platform. Assuming i830\n"))
                display->funcs.cdclk = &i830_cdclk_funcs;
 }
+
+int intel_cdclk_logical(const struct intel_cdclk_state *cdclk_state)
+{
+       return cdclk_state->logical.cdclk;
+}

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index a1cefd4..20a66f6 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -97,4 +97,6 @@ void intel_cdclk_crtc_disable_noatomic(struct intel_crtc *crtc);
 int intel_cdclk_init(struct intel_display *display);
 void intel_cdclk_debugfs_register(struct intel_display *display);
 
+int intel_cdclk_logical(const struct intel_cdclk_state *cdclk_state);
+
 #endif /* __INTEL_CDCLK_H__ */

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index de8bf29..cd6fa16 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4168,7 +4168,7 @@ static u16 hsw_ips_linetime_wm(const struct intel_crtc_state *crtc_state,
                return 0;
 
        linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8,
-                                       cdclk_state->logical.cdclk);
+                                       intel_cdclk_logical(cdclk_state));
 
        return min(linetime_wm, 0x1ff);
 }

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index ec1ef86..5d28a60 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1576,7 +1576,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
                if (IS_ERR(cdclk_state))
                        return PTR_ERR(cdclk_state);
 
-               if (crtc_state->pixel_rate >= cdclk_state->logical.cdclk * 95 / 100) {
+               if (crtc_state->pixel_rate >= intel_cdclk_logical(cdclk_state) * 95 / 100) {
                        plane_state->no_fbc_reason = "pixel rate too high";
                        return 0;
                }

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index f98c4a0..f234a3a 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2178,7 +2178,7 @@ cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state)
        }
 
        return min(1, DIV_ROUND_UP(crtc_state->pixel_rate,
-                                  2 * cdclk_state->logical.cdclk));
+                                  2 * intel_cdclk_logical(cdclk_state)));
 }
 
 static int