drm/amdgpu: change amdgpu_ttm_set_active_vram_size
authorChristian König <christian.koenig@amd.com>
Thu, 1 Mar 2018 10:01:52 +0000 (11:01 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 5 Mar 2018 20:37:12 +0000 (15:37 -0500)
Instead of setting the active VRAM size directly provide a the info if
we can use the buffer functions or not.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/amdgpu/si_dma.c

index f126a5a..46d7a69 100644 (file)
@@ -1411,7 +1411,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
                adev->gmc.visible_vram_size = vis_vram_limit;
 
        /* Change the size here instead of the init above so only lpfn is affected */
-       amdgpu_ttm_set_active_vram_size(adev, adev->gmc.visible_vram_size);
+       amdgpu_ttm_set_buffer_funcs_status(adev, false);
 #ifdef CONFIG_64BIT
        adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
                                                adev->gmc.visible_vram_size);
@@ -1526,17 +1526,28 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
        DRM_INFO("amdgpu: ttm finalized\n");
 }
 
-/* this should only be called at bootup or when userspace
- * isn't running */
-void amdgpu_ttm_set_active_vram_size(struct amdgpu_device *adev, u64 size)
+/**
+ * amdgpu_ttm_set_buffer_funcs_status - enable/disable use of buffer functions
+ *
+ * @adev: amdgpu_device pointer
+ * @enable: true when we can use buffer functions.
+ *
+ * Enable/disable use of buffer functions during suspend/resume. This should
+ * only be called at bootup or when userspace isn't running.
+ */
+void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
 {
-       struct ttm_mem_type_manager *man;
+       struct ttm_mem_type_manager *man = &adev->mman.bdev.man[TTM_PL_VRAM];
+       uint64_t size;
 
        if (!adev->mman.initialized)
                return;
 
-       man = &adev->mman.bdev.man[TTM_PL_VRAM];
        /* this just adjusts TTM size idea, which sets lpfn to the correct value */
+       if (enable)
+               size = adev->gmc.real_vram_size;
+       else
+               size = adev->gmc.visible_vram_size;
        man->size = size >> PAGE_SHIFT;
 }
 
index 0fba23c..b8117c6 100644 (file)
@@ -77,7 +77,8 @@ uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_mem_type_manager *man);
 
 int amdgpu_ttm_init(struct amdgpu_device *adev);
 void amdgpu_ttm_fini(struct amdgpu_device *adev);
-void amdgpu_ttm_set_active_vram_size(struct amdgpu_device *adev, u64 size);
+void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
+                                       bool enable);
 
 int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
                       uint64_t dst_offset, uint32_t byte_count,
index 69568cd..f48ea0d 100644 (file)
@@ -310,7 +310,7 @@ static void cik_sdma_gfx_stop(struct amdgpu_device *adev)
 
        if ((adev->mman.buffer_funcs_ring == sdma0) ||
            (adev->mman.buffer_funcs_ring == sdma1))
-               amdgpu_ttm_set_active_vram_size(adev, adev->gmc.visible_vram_size);
+                       amdgpu_ttm_set_buffer_funcs_status(adev, false);
 
        for (i = 0; i < adev->sdma.num_instances; i++) {
                rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]);
@@ -510,7 +510,7 @@ static int cik_sdma_gfx_resume(struct amdgpu_device *adev)
                }
 
                if (adev->mman.buffer_funcs_ring == ring)
-                       amdgpu_ttm_set_active_vram_size(adev, adev->gmc.real_vram_size);
+                       amdgpu_ttm_set_buffer_funcs_status(adev, true);
        }
 
        return 0;
index 6ccc9d4..6452101 100644 (file)
@@ -339,7 +339,7 @@ static void sdma_v2_4_gfx_stop(struct amdgpu_device *adev)
 
        if ((adev->mman.buffer_funcs_ring == sdma0) ||
            (adev->mman.buffer_funcs_ring == sdma1))
-               amdgpu_ttm_set_active_vram_size(adev, adev->gmc.visible_vram_size);
+               amdgpu_ttm_set_buffer_funcs_status(adev, false);
 
        for (i = 0; i < adev->sdma.num_instances; i++) {
                rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]);
@@ -484,7 +484,7 @@ static int sdma_v2_4_gfx_resume(struct amdgpu_device *adev)
                }
 
                if (adev->mman.buffer_funcs_ring == ring)
-                       amdgpu_ttm_set_active_vram_size(adev, adev->gmc.real_vram_size);
+                       amdgpu_ttm_set_buffer_funcs_status(adev, true);
        }
 
        return 0;
index 0c2b12e..9c4efd4 100644 (file)
@@ -510,7 +510,7 @@ static void sdma_v3_0_gfx_stop(struct amdgpu_device *adev)
 
        if ((adev->mman.buffer_funcs_ring == sdma0) ||
            (adev->mman.buffer_funcs_ring == sdma1))
-               amdgpu_ttm_set_active_vram_size(adev, adev->gmc.visible_vram_size);
+               amdgpu_ttm_set_buffer_funcs_status(adev, false);
 
        for (i = 0; i < adev->sdma.num_instances; i++) {
                rb_cntl = RREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i]);
@@ -750,7 +750,7 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev)
                }
 
                if (adev->mman.buffer_funcs_ring == ring)
-                       amdgpu_ttm_set_active_vram_size(adev, adev->gmc.real_vram_size);
+                       amdgpu_ttm_set_buffer_funcs_status(adev, true);
        }
 
        return 0;
index 87c01d9..215743d 100644 (file)
@@ -426,7 +426,7 @@ static void sdma_v4_0_gfx_stop(struct amdgpu_device *adev)
 
        if ((adev->mman.buffer_funcs_ring == sdma0) ||
            (adev->mman.buffer_funcs_ring == sdma1))
-               amdgpu_ttm_set_active_vram_size(adev, adev->gmc.visible_vram_size);
+                       amdgpu_ttm_set_buffer_funcs_status(adev, false);
 
        for (i = 0; i < adev->sdma.num_instances; i++) {
                rb_cntl = RREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));
@@ -668,7 +668,7 @@ static int sdma_v4_0_gfx_resume(struct amdgpu_device *adev)
                }
 
                if (adev->mman.buffer_funcs_ring == ring)
-                       amdgpu_ttm_set_active_vram_size(adev, adev->gmc.real_vram_size);
+                       amdgpu_ttm_set_buffer_funcs_status(adev, true);
 
        }
 
index acbf5af..b75d901 100644 (file)
@@ -121,7 +121,7 @@ static void si_dma_stop(struct amdgpu_device *adev)
                WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl);
 
                if (adev->mman.buffer_funcs_ring == ring)
-                       amdgpu_ttm_set_active_vram_size(adev, adev->gmc.visible_vram_size);
+                       amdgpu_ttm_set_buffer_funcs_status(adev, false);
                ring->ready = false;
        }
 }
@@ -184,7 +184,7 @@ static int si_dma_start(struct amdgpu_device *adev)
                }
 
                if (adev->mman.buffer_funcs_ring == ring)
-                       amdgpu_ttm_set_active_vram_size(adev, adev->gmc.real_vram_size);
+                       amdgpu_ttm_set_buffer_funcs_status(adev, true);
        }
 
        return 0;