drm/amdgpu/jpeg2: Add jpeg vmid update under IB submit

Add jpeg vmid update under IB submit

Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
index d2722ad..f3c1af5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
@@ -535,6 +535,10 @@ void jpeg_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
 {
        unsigned vmid = AMDGPU_JOB_GET_VMID(job);
 
+       amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_IH_CTRL_INTERNAL_OFFSET,
+               0, 0, PACKETJ_TYPE0));
+       amdgpu_ring_write(ring, (vmid << JPEG_IH_CTRL__IH_VMID__SHIFT));
+
        amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,
                0, 0, PACKETJ_TYPE0));
        amdgpu_ring_write(ring, (vmid | (vmid << 4)));
@@ -768,7 +772,7 @@ static const struct amdgpu_ring_funcs jpeg_v2_0_dec_ring_vm_funcs = {
                8 + /* jpeg_v2_0_dec_ring_emit_vm_flush */
                18 + 18 + /* jpeg_v2_0_dec_ring_emit_fence x2 vm fence */
                8 + 16,
-       .emit_ib_size = 22, /* jpeg_v2_0_dec_ring_emit_ib */
+       .emit_ib_size = 24, /* jpeg_v2_0_dec_ring_emit_ib */
        .emit_ib = jpeg_v2_0_dec_ring_emit_ib,
        .emit_fence = jpeg_v2_0_dec_ring_emit_fence,
        .emit_vm_flush = jpeg_v2_0_dec_ring_emit_vm_flush,

diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
index 1a03baa..654e43e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
@@ -41,6 +41,7 @@
 #define mmUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET                         0x4084
 #define mmUVD_JRBC_STATUS_INTERNAL_OFFSET                              0x4089
 #define mmUVD_JPEG_PITCH_INTERNAL_OFFSET                               0x401f
+#define mmUVD_JPEG_IH_CTRL_INTERNAL_OFFSET                             0x4149
 
 #define JRBC_DEC_EXTERNAL_REG_WRITE_ADDR                               0x18000