examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
- firmware {
- optee {
+ firmware {
+ optee {
compatible = "linaro,optee-tz";
method = "smc";
interrupts = <GIC_SPI 187 IRQ_TYPE_EDGE_RISING>;
};
- |
- firmware {
- optee {
+ firmware {
+ optee {
compatible = "linaro,optee-tz";
method = "hvc";
};
// Case 1: PSCI v0.1 only.
psci {
- compatible = "arm,psci";
- method = "smc";
- cpu_suspend = <0x95c10000>;
- cpu_off = <0x95c10001>;
- cpu_on = <0x95c10002>;
- migrate = <0x95c10003>;
+ compatible = "arm,psci";
+ method = "smc";
+ cpu_suspend = <0x95c10000>;
+ cpu_off = <0x95c10001>;
+ cpu_on = <0x95c10002>;
+ migrate = <0x95c10003>;
};
- |+
// Case 2: PSCI v0.2 only
psci {
- compatible = "arm,psci-0.2";
- method = "smc";
+ compatible = "arm,psci-0.2";
+ method = "smc";
};
- |+
cpu_pd1: power-domain-cpu1 {
#power-domain-cells = <0>;
- domain-idle-states = <&cpu_pwrdn>;
+ domain-idle-states = <&cpu_pwrdn>;
power-domains = <&cluster_pd>;
};
examples:
- |
- tn@109ab000 {
+ tn@109ab000 {
compatible = "qcom,coresight-tnoc", "arm,primecell";
reg = <0x109ab000 0x4200>;
#include <dt-bindings/clock/stih407-clks.h>
sata@9b20000 {
- compatible = "st,ahci";
- reg = <0x9b20000 0x1000>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
+ compatible = "st,ahci";
+ reg = <0x9b20000 0x1000>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
interrupt-names = "hostc";
- phys = <&phy_port0 PHY_TYPE_SATA>;
- phy-names = "sata-phy";
- resets = <&powerdown STIH407_SATA0_POWERDOWN>,
- <&softreset STIH407_SATA0_SOFTRESET>,
- <&softreset STIH407_SATA0_PWR_SOFTRESET>;
- reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
- clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
- clock-names = "ahci_clk";
+ phys = <&phy_port0 PHY_TYPE_SATA>;
+ phy-names = "sata-phy";
+ resets = <&powerdown STIH407_SATA0_POWERDOWN>,
+ <&softreset STIH407_SATA0_SOFTRESET>,
+ <&softreset STIH407_SATA0_PWR_SOFTRESET>;
+ reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
+ clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
+ clock-names = "ahci_clk";
};
"ovr1", "ovr2", "vp1", "vp2", "common1";
ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 67 1>,
- <&k3_clks 216 1>,
- <&k3_clks 67 2>;
+ clocks = <&k3_clks 67 1>,
+ <&k3_clks 216 1>,
+ <&k3_clks 67 2>;
clock-names = "fck", "vp1", "vp2";
interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
ports {
reg-names = "common", "vidl1", "vid",
"ovr1", "ovr2", "vp1", "vp2", "common1";
power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 186 6>,
- <&vp1_clock>,
- <&k3_clks 186 2>;
+ clocks = <&k3_clks 186 6>,
+ <&vp1_clock>,
+ <&k3_clks 186 2>;
clock-names = "fck", "vp1", "vp2";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
oldi-transmitters {
#include <dt-bindings/soc/ti,sci_pm_domain.h>
dss: dss@4a00000 {
- compatible = "ti,j721e-dss";
- reg = <0x04a00000 0x10000>, /* common_m */
- <0x04a10000 0x10000>, /* common_s0*/
- <0x04b00000 0x10000>, /* common_s1*/
- <0x04b10000 0x10000>, /* common_s2*/
- <0x04a20000 0x10000>, /* vidl1 */
- <0x04a30000 0x10000>, /* vidl2 */
- <0x04a50000 0x10000>, /* vid1 */
- <0x04a60000 0x10000>, /* vid2 */
- <0x04a70000 0x10000>, /* ovr1 */
- <0x04a90000 0x10000>, /* ovr2 */
- <0x04ab0000 0x10000>, /* ovr3 */
- <0x04ad0000 0x10000>, /* ovr4 */
- <0x04a80000 0x10000>, /* vp1 */
- <0x04aa0000 0x10000>, /* vp2 */
- <0x04ac0000 0x10000>, /* vp3 */
- <0x04ae0000 0x10000>, /* vp4 */
- <0x04af0000 0x10000>; /* wb */
- reg-names = "common_m", "common_s0",
- "common_s1", "common_s2",
- "vidl1", "vidl2","vid1","vid2",
- "ovr1", "ovr2", "ovr3", "ovr4",
- "vp1", "vp2", "vp3", "vp4",
- "wb";
- clocks = <&k3_clks 152 0>,
- <&k3_clks 152 1>,
- <&k3_clks 152 4>,
- <&k3_clks 152 9>,
- <&k3_clks 152 13>;
- clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
- power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
- interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "common_m",
- "common_s0",
- "common_s1",
- "common_s2";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
-
- dpi_out_0: endpoint {
- remote-endpoint = <&dp_bridge_input>;
- };
- };
+ compatible = "ti,j721e-dss";
+ reg = <0x04a00000 0x10000>, /* common_m */
+ <0x04a10000 0x10000>, /* common_s0*/
+ <0x04b00000 0x10000>, /* common_s1*/
+ <0x04b10000 0x10000>, /* common_s2*/
+ <0x04a20000 0x10000>, /* vidl1 */
+ <0x04a30000 0x10000>, /* vidl2 */
+ <0x04a50000 0x10000>, /* vid1 */
+ <0x04a60000 0x10000>, /* vid2 */
+ <0x04a70000 0x10000>, /* ovr1 */
+ <0x04a90000 0x10000>, /* ovr2 */
+ <0x04ab0000 0x10000>, /* ovr3 */
+ <0x04ad0000 0x10000>, /* ovr4 */
+ <0x04a80000 0x10000>, /* vp1 */
+ <0x04aa0000 0x10000>, /* vp2 */
+ <0x04ac0000 0x10000>, /* vp3 */
+ <0x04ae0000 0x10000>, /* vp4 */
+ <0x04af0000 0x10000>; /* wb */
+ reg-names = "common_m", "common_s0",
+ "common_s1", "common_s2",
+ "vidl1", "vidl2","vid1","vid2",
+ "ovr1", "ovr2", "ovr3", "ovr4",
+ "vp1", "vp2", "vp3", "vp4",
+ "wb";
+ clocks = <&k3_clks 152 0>,
+ <&k3_clks 152 1>,
+ <&k3_clks 152 4>,
+ <&k3_clks 152 9>,
+ <&k3_clks 152 13>;
+ clock-names = "fck", "vp1", "vp2", "vp3", "vp4";
+ power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
+ interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "common_m",
+ "common_s0",
+ "common_s1",
+ "common_s2";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+
+ dpi_out_0: endpoint {
+ remote-endpoint = <&dp_bridge_input>;
+ };
};
+ };
};
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
- dss: dss@2540000 {
- compatible = "ti,k2g-dss";
- reg = <0x02540000 0x400>,
- <0x02550000 0x1000>,
- <0x02557000 0x1000>,
- <0x0255a800 0x100>,
- <0x0255ac00 0x100>;
- reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
- clocks = <&k2g_clks 0x2 0>,
- <&k2g_clks 0x2 1>;
- clock-names = "fck", "vp1";
- interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
-
- power-domains = <&k2g_pds 0x2>;
-
- max-memory-bandwidth = <230000000>;
-
- port {
- dpi_out: endpoint {
- remote-endpoint = <&sii9022_in>;
- };
+ dss@2540000 {
+ compatible = "ti,k2g-dss";
+ reg = <0x02540000 0x400>,
+ <0x02550000 0x1000>,
+ <0x02557000 0x1000>,
+ <0x0255a800 0x100>,
+ <0x0255ac00 0x100>;
+ reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
+ clocks = <&k2g_clks 0x2 0>,
+ <&k2g_clks 0x2 1>;
+ clock-names = "fck", "vp1";
+ interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
+
+ power-domains = <&k2g_pds 0x2>;
+
+ max-memory-bandwidth = <230000000>;
+
+ port {
+ dpi_out: endpoint {
+ remote-endpoint = <&sii9022_in>;
};
+ };
};
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
dsp@10803000 {
- compatible = "mediatek,mt8195-dsp";
+ compatible = "mediatek,mt8195-dsp";
reg = <0x10803000 0x1000>,
<0x10840000 0x40000>;
reg-names = "cfg", "sram";
- |
gpio@8012e080 {
compatible = "st,nomadik-gpio";
- reg = <0x8012e080 0x80>;
+ reg = <0x8012e080 0x80>;
interrupts = <0 120 0x4>;
#gpio-cells = <2>;
gpio-controller;
i2c@fed40000 {
compatible = "st,comms-ssc4-i2c";
reg = <0xfed40000 0x110>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_s_a0_ls CLK_ICN_REG>;
clock-names = "ssc";
clock-frequency = <400000>;
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
- mailbox0: mailbox@8f00000 {
+ mailbox@8f00000 {
compatible = "st,stih407-mailbox";
reg = <0x8f00000 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
in-sd3-supply = <&vdd_5v0_vbus>;
in-ldo0-1-supply = <&vdd_1v8_vio>;
- in-ldo2-supply = <&vdd_3v3_vbat>;
+ in-ldo2-supply = <&vdd_3v3_vbat>;
in-ldo3-5-supply = <&vdd_3v3_vbat>;
in-ldo4-6-supply = <&vdd_3v3_vbat>;
in-ldo7-8-supply = <&vdd_1v8_vio>;
<GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi0",
- "msi1",
- "msi2",
- "msi3",
- "msi4",
- "msi5",
- "msi6",
- "msi7",
- "msi8",
- "msi9",
- "msi10",
- "msi11",
- "msi12",
- "msi13",
- "msi14",
- "msi15",
- "legacy";
+ interrupt-names = "msi0",
+ "msi1",
+ "msi2",
+ "msi3",
+ "msi4",
+ "msi5",
+ "msi6",
+ "msi7",
+ "msi8",
+ "msi9",
+ "msi10",
+ "msi11",
+ "msi12",
+ "msi13",
+ "msi14",
+ "msi15",
+ "legacy";
ieee80211-freq-limit = <5470000 5875000>;
};
opp-microvolt = <970000>, /* Supply 0 */
<960000>, /* Supply 1 */
<960000>; /* Supply 2 */
- opp-microamp = <70000>, /* Supply 0 */
- <70000>, /* Supply 1 */
- <70000>; /* Supply 2 */
+ opp-microamp = <70000>, /* Supply 0 */
+ <70000>, /* Supply 1 */
+ <70000>; /* Supply 2 */
clock-latency-ns = <300000>;
};
opp-microvolt = <975000 970000 985000>, /* Supply 0 */
<965000 960000 975000>, /* Supply 1 */
<965000 960000 975000>; /* Supply 2 */
- opp-microamp = <70000>, /* Supply 0 */
- <70000>, /* Supply 1 */
- <70000>; /* Supply 2 */
+ opp-microamp = <70000>, /* Supply 0 */
+ <70000>, /* Supply 1 */
+ <70000>; /* Supply 2 */
clock-latency-ns = <300000>;
};
opp-1000000002 {
opp-hz = /bits/ 64 <1000000002>;
opp-microvolt = <975000 970000 985000>, /* Supply 0 */
- <965000 960000 975000>, /* Supply 1 */
- <965000 960000 975000>; /* Supply 2 */
- opp-microamp = <70000>, /* Supply 0 */
- <0>, /* Supply 1 doesn't need this */
- <70000>; /* Supply 2 */
+ <965000 960000 975000>, /* Supply 1 */
+ <965000 960000 975000>; /* Supply 2 */
+ opp-microamp = <70000>, /* Supply 0 */
+ <0>, /* Supply 1 doesn't need this */
+ <70000>; /* Supply 2 */
clock-latency-ns = <300000>;
};
};
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt-slow = <915000 900000 925000>;
opp-microvolt-fast = <975000 970000 985000>;
- opp-microamp-slow = <70000>;
- opp-microamp-fast = <71000>;
+ opp-microamp-slow = <70000>;
+ opp-microamp-fast = <71000>;
};
opp-1200000000 {
<925000 910000 935000>; /* Supply vcc1 */
opp-microvolt-fast = <975000 970000 985000>, /* Supply vcc0 */
<965000 960000 975000>; /* Supply vcc1 */
- opp-microamp = <70000>; /* Will be used for both slow/fast */
+ opp-microamp = <70000>; /* Will be used for both slow/fast */
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
- groups = "uart0";
+ groups = "uart0";
};
};
};
reg = <0x24e00 0xb0>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&ipic>;
- fsl,cksel = <1>;
+ fsl,cksel = <1>;
fsl,tclk-period = <10>;
- fsl,tmr-prsc = <100>;
- fsl,tmr-add = <0x999999a4>;
- fsl,tmr-fiper1 = <0x3b9ac9f6>;
- fsl,tmr-fiper2 = <0x00018696>;
- fsl,max-adj = <659999998>;
+ fsl,tmr-prsc = <100>;
+ fsl,tmr-add = <0x999999a4>;
+ fsl,tmr-fiper1 = <0x3b9ac9f6>;
+ fsl,tmr-fiper2 = <0x00018696>;
+ fsl,max-adj = <659999998>;
};
examples:
- |
- pwm: pwm@10020000 {
+ pwm@10020000 {
compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
reg = <0x10020000 0x1000>;
clocks = <&tlclk>;
usb1v5-supply = <®_vusb1v5>;
usb1v8-supply = <®_vusb1v8>;
- usb3v1-supply = <®_vusb3v1>;
+ usb3v1-supply = <®_vusb3v1>;
usb_mode = <1>;
#phy-cells = <0>;