Merge patch series "RISC-V interrupt controller select cleanup"

Conor Dooley <conor@kernel.org> says:

From: Conor Dooley <conor.dooley@microchip.com>

Submitted a patch yesterday defaulting the SiFive PLIC driver to
enabled [0], and in the ensuing conversation Marc suggested just doing a
select at the arch level and dropping the user selectability completely.

* b4-shazam-merge:
  RISC-V: stop selecting SIFIVE_PLIC at the SoC level
  irqchip/riscv-intc: remove user selectability of RISCV_INTC
  irqchip/sifive-plic: remove user selectability of SIFIVE_PLIC

Link: https://lore.kernel.org/r/20221118104300.85016-1-conor@kernel.org
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/all/87zgceszp8.wl-maz@kernel.org/
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 532cd24..67ef08d 100644 (file)
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -127,6 +127,7 @@ config RISCV
        select PCI_MSI if PCI
        select RISCV_INTC
        select RISCV_TIMER if RISCV_SBI
+       select SIFIVE_PLIC
        select SPARSE_IRQ
        select SYSCTL_EXCEPTION_TRACE
        select THREAD_INFO_IN_TASK

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 69774bb..15e391f 100644 (file)
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -3,7 +3,6 @@ menu "SoC selection"
 config SOC_MICROCHIP_POLARFIRE
        bool "Microchip PolarFire SoCs"
        select MCHP_CLK_MPFS
-       select SIFIVE_PLIC
        help
          This enables support for Microchip PolarFire SoC platforms.
 
@@ -13,7 +12,6 @@ config SOC_SIFIVE
        select SERIAL_SIFIVE_CONSOLE if TTY
        select CLK_SIFIVE
        select CLK_SIFIVE_PRCI
-       select SIFIVE_PLIC
        select ERRATA_SIFIVE if !XIP_KERNEL
        help
          This enables support for SiFive SoC platform hardware.
@@ -22,7 +20,6 @@ config SOC_STARFIVE
        bool "StarFive SoCs"
        select PINCTRL
        select RESET_CONTROLLER
-       select SIFIVE_PLIC
        help
          This enables support for StarFive SoC platform hardware.
 
@@ -34,7 +31,6 @@ config SOC_VIRT
        select POWER_RESET_SYSCON_POWEROFF
        select GOLDFISH
        select RTC_DRV_GOLDFISH if RTC_CLASS
-       select SIFIVE_PLIC
        select PM_GENERIC_DOMAINS if PM
        select PM_GENERIC_DOMAINS_OF if PM && OF
        select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI
@@ -47,7 +43,6 @@ config SOC_CANAAN
        select CLINT_TIMER if RISCV_M_MODE
        select SERIAL_SIFIVE if TTY
        select SERIAL_SIFIVE_CONSOLE if TTY
-       select SIFIVE_PLIC
        select ARCH_HAS_RESET_CONTROLLER
        select PINCTRL
        select COMMON_CLK

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 7ef9f5e..4633a54 100644 (file)
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -538,31 +538,14 @@ config TI_PRUSS_INTC
          different processors within the SoC.
 
 config RISCV_INTC
-       bool "RISC-V Local Interrupt Controller"
+       bool
        depends on RISCV
-       default y
-       help
-          This enables support for the per-HART local interrupt controller
-          found in standard RISC-V systems.  The per-HART local interrupt
-          controller handles timer interrupts, software interrupts, and
-          hardware interrupts. Without a per-HART local interrupt controller,
-          a RISC-V system will be unable to handle any interrupts.
-
-          If you don't know what to do here, say Y.
 
 config SIFIVE_PLIC
-       bool "SiFive Platform-Level Interrupt Controller"
+       bool
        depends on RISCV
        select IRQ_DOMAIN_HIERARCHY
        select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
-       help
-          This enables support for the PLIC chip found in SiFive (and
-          potentially other) RISC-V systems.  The PLIC controls devices
-          interrupts and connects them to each core's local interrupt
-          controller.  Aside from timer and software interrupts, all other
-          interrupt sources are subordinate to the PLIC.
-
-          If you don't know what to do here, say Y.
 
 config EXYNOS_IRQ_COMBINER
        bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST