drm/amdgpu: restore dcc bo tilling configs while moving

While moving buffer which has dcc tiling config, it is needed to restore
its original dcc tiling.

1. extend copy flag to cover tiling bits
2. add logic to restore original dcc tiling config

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 58906bf..b8bc7fa 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -308,7 +308,8 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 
        mutex_lock(&adev->mman.gtt_window_lock);
        while (src_mm.remaining) {
-               uint64_t from, to, cur_size;
+               uint64_t from, to, cur_size, tiling_flags;
+               uint32_t num_type, data_format, max_com;
                struct dma_fence *next;
 
                /* Never copy more than 256MiB at once to avoid a timeout */
@@ -329,10 +330,20 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
                abo_dst = ttm_to_amdgpu_bo(dst->bo);
                if (tmz)
                        copy_flags |= AMDGPU_COPY_FLAGS_TMZ;
-               if (abo_src->flags & AMDGPU_GEM_CREATE_GFX12_DCC)
+               if ((abo_src->flags & AMDGPU_GEM_CREATE_GFX12_DCC) &&
+                   (abo_src->tbo.resource->mem_type == TTM_PL_VRAM))
                        copy_flags |= AMDGPU_COPY_FLAGS_READ_DECOMPRESSED;
-               if (abo_dst->flags & AMDGPU_GEM_CREATE_GFX12_DCC)
+               if ((abo_dst->flags & AMDGPU_GEM_CREATE_GFX12_DCC) &&
+                   (dst->mem->mem_type == TTM_PL_VRAM)) {
                        copy_flags |= AMDGPU_COPY_FLAGS_WRITE_COMPRESSED;
+                       amdgpu_bo_get_tiling_flags(abo_dst, &tiling_flags);
+                       max_com = AMDGPU_TILING_GET(tiling_flags, GFX12_DCC_MAX_COMPRESSED_BLOCK);
+                       num_type = AMDGPU_TILING_GET(tiling_flags, GFX12_DCC_NUMBER_TYPE);
+                       data_format = AMDGPU_TILING_GET(tiling_flags, GFX12_DCC_DATA_FORMAT);
+                       copy_flags |= (AMDGPU_COPY_FLAGS_SET(MAX_COMPRESSED, max_com) |
+                                      AMDGPU_COPY_FLAGS_SET(NUMBER_TYPE, num_type) |
+                                      AMDGPU_COPY_FLAGS_SET(DATA_FORMAT, data_format));
+               }
 
                r = amdgpu_copy_buffer(ring, from, to, cur_size, resv,
                                       &next, false, true, copy_flags);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index f2eb1cf..138d800 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -112,6 +112,17 @@ struct amdgpu_copy_mem {
 #define AMDGPU_COPY_FLAGS_TMZ          (1 << 0)
 #define AMDGPU_COPY_FLAGS_READ_DECOMPRESSED    (1 << 1)
 #define AMDGPU_COPY_FLAGS_WRITE_COMPRESSED     (1 << 2)
+#define AMDGPU_COPY_FLAGS_MAX_COMPRESSED_SHIFT         3
+#define AMDGPU_COPY_FLAGS_MAX_COMPRESSED_MASK          0x03
+#define AMDGPU_COPY_FLAGS_NUMBER_TYPE_SHIFT            5
+#define AMDGPU_COPY_FLAGS_NUMBER_TYPE_MASK             0x07
+#define AMDGPU_COPY_FLAGS_DATA_FORMAT_SHIFT            8
+#define AMDGPU_COPY_FLAGS_DATA_FORMAT_MASK             0x3f
+
+#define AMDGPU_COPY_FLAGS_SET(field, value) \
+       (((__u32)(value) & AMDGPU_COPY_FLAGS_##field##_MASK) << AMDGPU_COPY_FLAGS_##field##_SHIFT)
+#define AMDGPU_COPY_FLAGS_GET(value, field) \
+       (((__u32)(value) >> AMDGPU_COPY_FLAGS_##field##_SHIFT) & AMDGPU_COPY_FLAGS_##field##_MASK)
 
 int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size);
 void amdgpu_gtt_mgr_fini(struct amdgpu_device *adev);

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
index 96514fd..41b5e45 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
@@ -1566,6 +1566,12 @@ static void sdma_v7_0_emit_copy_buffer(struct amdgpu_ib *ib,
                                       uint32_t byte_count,
                                       uint32_t copy_flags)
 {
+       uint32_t num_type, data_format, max_com;
+
+       max_com = AMDGPU_COPY_FLAGS_GET(copy_flags, MAX_COMPRESSED);
+       data_format = AMDGPU_COPY_FLAGS_GET(copy_flags, DATA_FORMAT);
+       num_type = AMDGPU_COPY_FLAGS_GET(copy_flags, NUMBER_TYPE);
+
        ib->ptr[ib->length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COPY) |
                SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR) |
                SDMA_PKT_COPY_LINEAR_HEADER_TMZ((copy_flags & AMDGPU_COPY_FLAGS_TMZ) ? 1 : 0) |
@@ -1580,10 +1586,10 @@ static void sdma_v7_0_emit_copy_buffer(struct amdgpu_ib *ib,
        ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);
 
        if ((copy_flags & (AMDGPU_COPY_FLAGS_READ_DECOMPRESSED | AMDGPU_COPY_FLAGS_WRITE_COMPRESSED)))
-               ib->ptr[ib->length_dw++] = SDMA_DCC_DATA_FORMAT(4) | SDMA_DCC_NUM_TYPE(4) |
+               ib->ptr[ib->length_dw++] = SDMA_DCC_DATA_FORMAT(data_format) | SDMA_DCC_NUM_TYPE(num_type) |
                        ((copy_flags & AMDGPU_COPY_FLAGS_READ_DECOMPRESSED) ? SDMA_DCC_READ_CM(2) : 0) |
                        ((copy_flags & AMDGPU_COPY_FLAGS_WRITE_COMPRESSED) ? SDMA_DCC_WRITE_CM(1) : 0) |
-                       SDMA_DCC_MAX_COM(1) | SDMA_DCC_MAX_UCOM(1);
+                       SDMA_DCC_MAX_COM(max_com) | SDMA_DCC_MAX_UCOM(1);
 }
 
 /**