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arm64/arch_timer: Fix MMIO byteswap
author
Peter Zijlstra
<peterz@infradead.org>
Tue, 6 Jun 2023 08:06:14 +0000
(10:06 +0200)
committer
Peter Zijlstra
<peterz@infradead.org>
Tue, 6 Jun 2023 08:19:51 +0000
(10:19 +0200)
The readl_relaxed() to __raw_readl() change meant to loose the
instrumentation, but also (inadvertently) lost the byteswap.
Fixes:
24ee7607b286
("arm64/arch_timer: Provide noinstr sched_clock_read() functions")
Reported-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link:
https://lkml.kernel.org/r/20230606080614.GB905437@hirez.programming.kicks-ass.net
drivers/clocksource/arm_arch_timer.c
patch
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diff --git
a/drivers/clocksource/arm_arch_timer.c
b/drivers/clocksource/arm_arch_timer.c
index
b23d23b
..
e733a2a
100644
(file)
--- a/
drivers/clocksource/arm_arch_timer.c
+++ b/
drivers/clocksource/arm_arch_timer.c
@@
-776,9
+776,9
@@
static noinstr u64 arch_counter_get_cnt_mem(struct arch_timer *t, int offset_lo)
u32 cnt_lo, cnt_hi, tmp_hi;
do {
- cnt_hi = __
raw_readl(t->base + offset_lo + 4
);
- cnt_lo = __
raw_readl(t->base + offset_lo
);
- tmp_hi = __
raw_readl(t->base + offset_lo + 4
);
+ cnt_hi = __
le32_to_cpu((__le32 __force)__raw_readl(t->base + offset_lo + 4)
);
+ cnt_lo = __
le32_to_cpu((__le32 __force)__raw_readl(t->base + offset_lo)
);
+ tmp_hi = __
le32_to_cpu((__le32 __force)__raw_readl(t->base + offset_lo + 4)
);
} while (cnt_hi != tmp_hi);
return ((u64) cnt_hi << 32) | cnt_lo;