watchdog: s3c2410_wdt: Add exynos990-wdt compatible data

The Exynos990 has two watchdog clusters - cl0 and cl2. Add new
driver data for these two clusters, making it possible to use the
watchdog timer on this SoC.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20250420-wdt-resends-april-v1-2-f58639673959@mentallysanemainliners.org
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>

diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index bdd81d8..40901bd 100644 (file)
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -82,6 +82,10 @@
 #define GS_CLUSTER2_NONCPU_INT_EN              0x1644
 #define GS_RST_STAT_REG_OFFSET                 0x3B44
 
+#define EXYNOS990_CLUSTER2_NONCPU_OUT          0x1620
+#define EXYNOS990_CLUSTER2_NONCPU_INT_EN       0x1644
+#define EXYNOS990_CLUSTER2_WDTRESET_BIT                23
+
 /**
  * DOC: Quirk flags for different Samsung watchdog IP-cores
  *
@@ -259,6 +263,32 @@ static const struct s3c2410_wdt_variant drv_data_exynos850_cl1 = {
                  QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN,
 };
 
+static const struct s3c2410_wdt_variant drv_data_exynos990_cl0 = {
+       .mask_reset_reg = GS_CLUSTER0_NONCPU_INT_EN,
+       .mask_bit = 2,
+       .mask_reset_inv = true,
+       .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
+       .rst_stat_bit = EXYNOS850_CLUSTER0_WDTRESET_BIT,
+       .cnt_en_reg = EXYNOSAUTOV920_CLUSTER0_NONCPU_OUT,
+       .cnt_en_bit = 7,
+       .quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET |
+                 QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN |
+                 QUIRK_HAS_DBGACK_BIT,
+};
+
+static const struct s3c2410_wdt_variant drv_data_exynos990_cl2 = {
+       .mask_reset_reg = EXYNOS990_CLUSTER2_NONCPU_INT_EN,
+       .mask_bit = 2,
+       .mask_reset_inv = true,
+       .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
+       .rst_stat_bit = EXYNOS990_CLUSTER2_WDTRESET_BIT,
+       .cnt_en_reg = EXYNOS990_CLUSTER2_NONCPU_OUT,
+       .cnt_en_bit = 7,
+       .quirks = QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET |
+                 QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN |
+                 QUIRK_HAS_DBGACK_BIT,
+};
+
 static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl0 = {
        .mask_reset_reg = EXYNOS850_CLUSTER0_NONCPU_INT_EN,
        .mask_bit = 2,
@@ -350,6 +380,8 @@ static const struct of_device_id s3c2410_wdt_match[] = {
          .data = &drv_data_exynos7 },
        { .compatible = "samsung,exynos850-wdt",
          .data = &drv_data_exynos850_cl0 },
+       { .compatible = "samsung,exynos990-wdt",
+         .data = &drv_data_exynos990_cl0 },
        { .compatible = "samsung,exynosautov9-wdt",
          .data = &drv_data_exynosautov9_cl0 },
        { .compatible = "samsung,exynosautov920-wdt",
@@ -678,7 +710,8 @@ s3c2410_get_wdt_drv_data(struct platform_device *pdev, struct s3c2410_wdt *wdt)
        if (variant == &drv_data_exynos850_cl0 ||
            variant == &drv_data_exynosautov9_cl0 ||
            variant == &drv_data_gs101_cl0 ||
-           variant == &drv_data_exynosautov920_cl0) {
+           variant == &drv_data_exynosautov920_cl0 ||
+           variant == &drv_data_exynos990_cl0) {
                u32 index;
                int err;
 
@@ -700,6 +733,10 @@ s3c2410_get_wdt_drv_data(struct platform_device *pdev, struct s3c2410_wdt *wdt)
                        else if (variant == &drv_data_exynosautov920_cl0)
                                variant = &drv_data_exynosautov920_cl1;
                        break;
+               case 2:
+                       if (variant == &drv_data_exynos990_cl0)
+                               variant = &drv_data_exynos990_cl2;
+                       break;
                default:
                        return dev_err_probe(dev, -EINVAL, "wrong cluster index: %u\n", index);
                }