wifi: rtw89: reset AFEDIG register in power off sequence
authorChin-Yen Lee <timlee@realtek.com>
Fri, 26 Apr 2024 06:11:59 +0000 (14:11 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Thu, 2 May 2024 02:57:51 +0000 (10:57 +0800)
Some Wi-Fi chips meet card lost issue due to unstable hardware signal of
GPIO pins during power off. Reset AFEDIG register before BB reset in
power off sequence could avoid unstable signal and fix the issue.

Signed-off-by: Chin-Yen Lee <timlee@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240426061200.44262-1-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/rtw8851b.c
drivers/net/wireless/realtek/rtw89/rtw8852b.c
drivers/net/wireless/realtek/rtw89/rtw8852c.c

index 2e89c18..87b5182 100644 (file)
@@ -2320,6 +2320,7 @@ static int rtw8851b_mac_disable_bb_rf(struct rtw89_dev *rtwdev)
        u8 wl_rfc_s1;
        int ret;
 
+       rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG);
        rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN,
                         B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN);
 
index 9b8f1d0..d351096 100644 (file)
@@ -562,6 +562,7 @@ static int rtw8852b_pwr_off_func(struct rtw89_dev *rtwdev)
                return ret;
 
        rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON);
+       rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG);
        rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, B_AX_FEN_BB_GLB_RSTN | B_AX_FEN_BBRSTB);
        rtw89_write32_clr(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_RFC_1P3);
 
@@ -2481,6 +2482,7 @@ static int rtw8852b_mac_disable_bb_rf(struct rtw89_dev *rtwdev)
        u8 wl_rfc_s1;
        int ret;
 
+       rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG);
        rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN,
                         B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN);
 
index db354af..efc772e 100644 (file)
@@ -338,6 +338,7 @@ static int rtw8852c_pwr_off_func(struct rtw89_dev *rtwdev)
                return ret;
 
        rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON);
+       rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG);
        rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, B_AX_FEN_BB_GLB_RSTN | B_AX_FEN_BBRSTB);
        rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND,
                          B_AX_R_SYM_FEN_WLBBGLB_1 | B_AX_R_SYM_FEN_WLBBFUN_1);
@@ -2816,6 +2817,7 @@ static int rtw8852c_mac_enable_bb_rf(struct rtw89_dev *rtwdev)
 
 static int rtw8852c_mac_disable_bb_rf(struct rtw89_dev *rtwdev)
 {
+       rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG);
        rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN,
                         B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN);