arm64: add C wrappers for SET_PSTATE_*()
authorMark Rutland <mark.rutland@arm.com>
Fri, 13 Nov 2020 12:49:22 +0000 (12:49 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Wed, 2 Dec 2020 19:44:02 +0000 (19:44 +0000)
To make callsites easier to read, add trivial C wrappers for the
SET_PSTATE_*() helpers, and convert trivial uses over to these. The new
wrappers will be used further in subsequent patches.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Christoph Hellwig <hch@lst.de>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20201113124937.20574-3-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/sysreg.h
arch/arm64/kernel/cpufeature.c
arch/arm64/kernel/proton-pack.c

index 174817b..24160f7 100644 (file)
 #define SET_PSTATE_SSBS(x)             __emit_inst(0xd500401f | PSTATE_SSBS | ((!!x) << PSTATE_Imm_shift))
 #define SET_PSTATE_TCO(x)              __emit_inst(0xd500401f | PSTATE_TCO | ((!!x) << PSTATE_Imm_shift))
 
+#define set_pstate_pan(x)              asm volatile(SET_PSTATE_PAN(x))
+#define set_pstate_uao(x)              asm volatile(SET_PSTATE_UAO(x))
+#define set_pstate_ssbs(x)             asm volatile(SET_PSTATE_SSBS(x))
+
 #define __SYS_BARRIER_INSN(CRm, op2, Rt) \
        __emit_inst(0xd5000000 | sys_insn(0, 3, 3, (CRm), (op2)) | ((Rt) & 0x1f))
 
index b7b6804..403fb0d 100644 (file)
@@ -1598,7 +1598,7 @@ static void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused)
        WARN_ON_ONCE(in_interrupt());
 
        sysreg_clear_set(sctlr_el1, SCTLR_EL1_SPAN, 0);
-       asm(SET_PSTATE_PAN(1));
+       set_pstate_pan(1);
 }
 #endif /* CONFIG_ARM64_PAN */
 
index 4b202e4..6809b55 100644 (file)
@@ -538,12 +538,12 @@ static enum mitigation_state spectre_v4_enable_hw_mitigation(void)
 
        if (spectre_v4_mitigations_off()) {
                sysreg_clear_set(sctlr_el1, 0, SCTLR_ELx_DSSBS);
-               asm volatile(SET_PSTATE_SSBS(1));
+               set_pstate_ssbs(1);
                return SPECTRE_VULNERABLE;
        }
 
        /* SCTLR_EL1.DSSBS was initialised to 0 during boot */
-       asm volatile(SET_PSTATE_SSBS(0));
+       set_pstate_ssbs(0);
        return SPECTRE_MITIGATED;
 }