pinctrl: sunxi: a64: Rename function ts0 to ts
authorChen-Yu Tsai <wens@csie.org>
Mon, 3 Dec 2018 15:41:00 +0000 (23:41 +0800)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 7 Dec 2018 12:29:28 +0000 (13:29 +0100)
The A64 only has one TS (transport stream) controller. The datasheet
also lists the function as TS_XXX instead of TS0_XXX.

Rename the function names now before any there are any users.

Fixes: 96851d391d02 ("drivers: pinctrl: add driver for Allwinner A64 SoC")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c

index 8b974b2..7b83d37 100644 (file)
@@ -324,62 +324,62 @@ static const struct sunxi_desc_pin a64_pins[] = {
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* PCK */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* CLK */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* CLK */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* CK */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* ERR */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* ERR */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* HSYNC */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* SYNC */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* SYNC */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* VSYNC */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* DVLD */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* DVLD */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* D0 */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* D0 */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* D0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* D1 */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* D1 */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* D1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* D2 */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* D2 */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* D2 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* D3 */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* D3 */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* D3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* D4 */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* D4 */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* D4 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* D5 */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* D5 */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* D5 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* D6 */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* D6 */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* D6 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
                  SUNXI_FUNCTION(0x2, "csi"),           /* D7 */
-                 SUNXI_FUNCTION(0x4, "ts0")),          /* D7 */
+                 SUNXI_FUNCTION(0x4, "ts")),           /* D7 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),