drm/xe/guc: Split GuC params used for "hwconfig" and "post-hwconfig"

Move params that are not used for initial "hwconfig" load to
"post-hwconfig" phase.

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index e6f680e..482cb0d 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -182,6 +182,26 @@ static void guc_init_params(struct xe_guc *guc)
        BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
        BUILD_BUG_ON(GUC_CTL_MAX_DWORDS + 2 != SOFT_SCRATCH_COUNT);
 
+       params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
+       params[GUC_CTL_FEATURE] = 0;
+       params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
+       params[GUC_CTL_ADS] = guc_ctl_ads_flags(guc);
+       params[GUC_CTL_WA] = 0;
+       params[GUC_CTL_DEVID] = guc_ctl_devid(guc);
+
+       for (i = 0; i < GUC_CTL_MAX_DWORDS; i++)
+               drm_dbg(&xe->drm, "GuC param[%2d] = 0x%08x\n", i, params[i]);
+}
+
+static void guc_init_params_post_hwconfig(struct xe_guc *guc)
+{
+       struct xe_device *xe = guc_to_xe(guc);
+       u32 *params = guc->params;
+       int i;
+
+       BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
+       BUILD_BUG_ON(GUC_CTL_MAX_DWORDS + 2 != SOFT_SCRATCH_COUNT);
+
        params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
        params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
        params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
@@ -279,6 +299,8 @@ out:
  */
 int xe_guc_init_post_hwconfig(struct xe_guc *guc)
 {
+       guc_init_params_post_hwconfig(guc);
+
        return xe_guc_ads_init_post_hwconfig(&guc->ads);
 }