Merge branch 'remotes/lorenzo/pci/iproc'

- Declare iproc register set sizes to help avoid out-of-bound accesses
  (Bharat Gooty)

- Invalidate iproc PAXB IARR1/IMAP1 inbound windows to erase bootloader
  footprint (Roman Bacik)

- Log Root Port link speed & width at startup (Srinath Mannam)

* remotes/lorenzo/pci/iproc:
  PCI: iproc: Enhance PCIe Link information display
  PCI: iproc: Invalidate correct PAXB inbound windows
  PCI: iproc: Fix out-of-bound array accesses

diff --git a/drivers/pci/controller/pcie-iproc.c b/drivers/pci/controller/pcie-iproc.c
index 5036623..02e52f6 100644 (file)
--- a/drivers/pci/controller/pcie-iproc.c
+++ b/drivers/pci/controller/pcie-iproc.c
@@ -185,8 +185,15 @@ static const struct iproc_pcie_ib_map paxb_v2_ib_map[] = {
                .imap_window_offset = 0x4,
        },
        {
-               /* IARR1/IMAP1 (currently unused) */
-               .type = IPROC_PCIE_IB_MAP_INVALID,
+               /* IARR1/IMAP1 */
+               .type = IPROC_PCIE_IB_MAP_MEM,
+               .size_unit = SZ_1M,
+               .region_sizes = { 8 },
+               .nr_sizes = 1,
+               .nr_windows = 8,
+               .imap_addr_offset = 0x4,
+               .imap_window_offset = 0x8,
+
        },
        {
                /* IARR2/IMAP2 */
@@ -300,7 +307,7 @@ enum iproc_pcie_reg {
 };
 
 /* iProc PCIe PAXB BCMA registers */
-static const u16 iproc_pcie_reg_paxb_bcma[] = {
+static const u16 iproc_pcie_reg_paxb_bcma[IPROC_PCIE_MAX_NUM_REG] = {
        [IPROC_PCIE_CLK_CTRL]           = 0x000,
        [IPROC_PCIE_CFG_IND_ADDR]       = 0x120,
        [IPROC_PCIE_CFG_IND_DATA]       = 0x124,
@@ -311,7 +318,7 @@ static const u16 iproc_pcie_reg_paxb_bcma[] = {
 };
 
 /* iProc PCIe PAXB registers */
-static const u16 iproc_pcie_reg_paxb[] = {
+static const u16 iproc_pcie_reg_paxb[IPROC_PCIE_MAX_NUM_REG] = {
        [IPROC_PCIE_CLK_CTRL]           = 0x000,
        [IPROC_PCIE_CFG_IND_ADDR]       = 0x120,
        [IPROC_PCIE_CFG_IND_DATA]       = 0x124,
@@ -327,7 +334,7 @@ static const u16 iproc_pcie_reg_paxb[] = {
 };
 
 /* iProc PCIe PAXB v2 registers */
-static const u16 iproc_pcie_reg_paxb_v2[] = {
+static const u16 iproc_pcie_reg_paxb_v2[IPROC_PCIE_MAX_NUM_REG] = {
        [IPROC_PCIE_CLK_CTRL]           = 0x000,
        [IPROC_PCIE_CFG_IND_ADDR]       = 0x120,
        [IPROC_PCIE_CFG_IND_DATA]       = 0x124,
@@ -344,6 +351,8 @@ static const u16 iproc_pcie_reg_paxb_v2[] = {
        [IPROC_PCIE_OMAP3]              = 0xdf8,
        [IPROC_PCIE_IARR0]              = 0xd00,
        [IPROC_PCIE_IMAP0]              = 0xc00,
+       [IPROC_PCIE_IARR1]              = 0xd08,
+       [IPROC_PCIE_IMAP1]              = 0xd70,
        [IPROC_PCIE_IARR2]              = 0xd10,
        [IPROC_PCIE_IMAP2]              = 0xcc0,
        [IPROC_PCIE_IARR3]              = 0xe00,
@@ -356,7 +365,7 @@ static const u16 iproc_pcie_reg_paxb_v2[] = {
 };
 
 /* iProc PCIe PAXC v1 registers */
-static const u16 iproc_pcie_reg_paxc[] = {
+static const u16 iproc_pcie_reg_paxc[IPROC_PCIE_MAX_NUM_REG] = {
        [IPROC_PCIE_CLK_CTRL]           = 0x000,
        [IPROC_PCIE_CFG_IND_ADDR]       = 0x1f0,
        [IPROC_PCIE_CFG_IND_DATA]       = 0x1f4,
@@ -365,7 +374,7 @@ static const u16 iproc_pcie_reg_paxc[] = {
 };
 
 /* iProc PCIe PAXC v2 registers */
-static const u16 iproc_pcie_reg_paxc_v2[] = {
+static const u16 iproc_pcie_reg_paxc_v2[IPROC_PCIE_MAX_NUM_REG] = {
        [IPROC_PCIE_MSI_GIC_MODE]       = 0x050,
        [IPROC_PCIE_MSI_BASE_ADDR]      = 0x074,
        [IPROC_PCIE_MSI_WINDOW_SIZE]    = 0x078,
@@ -1455,6 +1464,7 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
 {
        struct device *dev;
        int ret;
+       struct pci_dev *pdev;
        struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie);
 
        dev = pcie->dev;
@@ -1518,6 +1528,11 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
                goto err_power_off_phy;
        }
 
+       for_each_pci_bridge(pdev, host->bus) {
+               if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
+                       pcie_print_link_status(pdev);
+       }
+
        return 0;
 
 err_power_off_phy: