memory: samsung: exynos5422-dmc: Fix tFAW timings alignment

Aligning of tFAW timing with standard was using wrong argument as
minimum acceptable value.  This could lead to wrong timing if provided
timings and clock period do not match the standard.

Fixes: 6e7674c3c6df ("memory: Add DMC driver for Exynos5422")
Cc: <stable@vger.kernel.org>
Signed-off-by: Bernard Zhao <bernard@vivo.com>
Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

diff --git a/drivers/memory/samsung/exynos5422-dmc.c b/drivers/memory/samsung/exynos5422-dmc.c
index 81a1b1d..22a43d6 100644 (file)
--- a/drivers/memory/samsung/exynos5422-dmc.c
+++ b/drivers/memory/samsung/exynos5422-dmc.c
@@ -1091,7 +1091,7 @@ static int create_timings_aligned(struct exynos5_dmc *dmc, u32 *reg_timing_row,
        /* power related timings */
        val = dmc->timings->tFAW / clk_period_ps;
        val += dmc->timings->tFAW % clk_period_ps ? 1 : 0;
-       val = max(val, dmc->min_tck->tXP);
+       val = max(val, dmc->min_tck->tFAW);
        reg = &timing_power[0];
        *reg_timing_power |= TIMING_VAL2REG(reg, val);