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clk: versaclock3: Convert to use maple tree register cache
author
Mark Brown
<broonie@kernel.org>
Fri, 29 Sep 2023 14:26:06 +0000
(16:26 +0200)
committer
Stephen Boyd
<sboyd@kernel.org>
Tue, 10 Oct 2023 03:31:22 +0000
(20:31 -0700)
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link:
https://lore.kernel.org/r/20230929-clk-maple-versaclk-v1-2-24dd5b3d8689@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-versaclock3.c
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diff --git
a/drivers/clk/clk-versaclock3.c
b/drivers/clk/clk-versaclock3.c
index
a5ab48f
..
b4a89c0
100644
(file)
--- a/
drivers/clk/clk-versaclock3.c
+++ b/
drivers/clk/clk-versaclock3.c
@@
-589,7
+589,7
@@
static const struct clk_ops vc3_clk_mux_ops = {
static const struct regmap_config vc3_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
- .cache_type = REGCACHE_
RBTRE
E,
+ .cache_type = REGCACHE_
MAPL
E,
.max_register = 0x24,
};