cxl/pci: Rename CXL REGLOC ID

The current naming is confusing and wrong. The Register Locator is
identified by the DSVSEC identifier, not an offset.

Cc: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Link: https://lore.kernel.org/r/20210618003009.956929-1-ben.widawsky@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index f8408e5..4cf351a 100644 (file)
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -1086,7 +1086,7 @@ static int cxl_mem_setup_regs(struct cxl_mem *cxlm)
        LIST_HEAD(register_maps);
        int ret = 0;
 
-       regloc = cxl_mem_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_OFFSET);
+       regloc = cxl_mem_dvsec(pdev, PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID);
        if (!regloc) {
                dev_err(dev, "register location dvsec not found\n");
                return -ENXIO;

diff --git a/drivers/cxl/pci.h b/drivers/cxl/pci.h
index af3ec07..dad7a83 100644 (file)
--- a/drivers/cxl/pci.h
+++ b/drivers/cxl/pci.h
@@ -13,7 +13,7 @@
 #define PCI_DVSEC_VENDOR_ID_CXL                0x1E98
 #define PCI_DVSEC_ID_CXL               0x0
 
-#define PCI_DVSEC_ID_CXL_REGLOC_OFFSET         0x8
+#define PCI_DVSEC_ID_CXL_REGLOC_DVSEC_ID       0x8
 #define PCI_DVSEC_ID_CXL_REGLOC_BLOCK1_OFFSET  0xC
 
 /* BAR Indicator Register (BIR) */