drm/amd/display: Initialize num_pkrs on VANGOGH.

As far a I can tell uses a variant of DCN3xx which uses num_pkrs.

If we do not initialize the variable we will set the register field
to ilog2(0) = -1, though the mask will reduce that to 7. Pretty sure
7 is not the value we want here.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-and-Tested-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index dd9a08d..5078534 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4036,7 +4036,8 @@ fill_plane_buffer_attributes(struct amdgpu_device *adev,
 #ifdef CONFIG_DRM_AMD_DC_DCN3_0
                if (adev->asic_type == CHIP_SIENNA_CICHLID ||
                    adev->asic_type == CHIP_NAVY_FLOUNDER ||
-                   adev->asic_type == CHIP_DIMGREY_CAVEFISH)
+                   adev->asic_type == CHIP_DIMGREY_CAVEFISH ||
+                   adev->asic_type == CHIP_VANGOGH)
                        tiling_info->gfx9.num_pkrs = adev->gfx.config.gb_addr_config_fields.num_pkrs;
 #endif
                ret = fill_plane_dcc_attributes(adev, afb, format, rotation,