drm/i915/ddi: Flush encoder power domain ref puts during driver unload

An async-put on an encoder specific power domain (for instance the AUX
PW domain) may be pending when removing the encoder. Make sure any such
async-puts are complete while the corresponding encoder is still in place
since at least AUX power wells require this to do a power well->PHY
lookup.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526143729.2563672-1-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4d6f1a2..0b7fef5 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4063,9 +4063,11 @@ static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
 
 static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
 {
+       struct drm_i915_private *i915 = to_i915(encoder->dev);
        struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
 
        intel_dp_encoder_flush_work(encoder);
+       intel_display_power_flush_work(i915);
 
        drm_encoder_cleanup(encoder);
        if (dig_port)