arm64: dts: ls1028a: Add esdhc node in dts
authorAshish Kumar <Ashish.Kumar@nxp.com>
Thu, 15 Aug 2019 03:39:01 +0000 (11:39 +0800)
committerShawn Guo <shawnguo@kernel.org>
Mon, 19 Aug 2019 14:04:50 +0000 (16:04 +0200)
This patch is to add esdhc node and enable SD UHS-I,
eMMC HS200 for ls1028ardb/ls1028aqds board.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

index de6ef39..5e14e5a 100644 (file)
        status = "okay";
 };
 
+&esdhc {
+       status = "okay";
+};
+
+&esdhc1 {
+       status = "okay";
+};
+
 &i2c0 {
        status = "okay";
 
index 9fb9113..1a69221 100644 (file)
        };
 };
 
+&esdhc {
+       sd-uhs-sdr104;
+       sd-uhs-sdr50;
+       sd-uhs-sdr25;
+       sd-uhs-sdr12;
+       status = "okay";
+};
+
+&esdhc1 {
+       mmc-hs200-1_8v;
+       status = "okay";
+};
+
 &i2c0 {
        status = "okay";
 
index 0b317eb..b139b29 100644 (file)
                        status = "disabled";
                };
 
+               esdhc: mmc@2140000 {
+                       compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
+                       reg = <0x0 0x2140000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-frequency = <0>; /* fixed up by bootloader */
+                       clocks = <&clockgen 2 1>;
+                       voltage-ranges = <1800 1800 3300 3300>;
+                       sdhci,auto-cmd12;
+                       little-endian;
+                       bus-width = <4>;
+                       status = "disabled";
+               };
+
+               esdhc1: mmc@2150000 {
+                       compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
+                       reg = <0x0 0x2150000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-frequency = <0>; /* fixed up by bootloader */
+                       clocks = <&clockgen 2 1>;
+                       voltage-ranges = <1800 1800 3300 3300>;
+                       sdhci,auto-cmd12;
+                       broken-cd;
+                       little-endian;
+                       bus-width = <4>;
+                       status = "disabled";
+               };
+
                duart0: serial@21c0500 {
                        compatible = "fsl,ns16550", "ns16550a";
                        reg = <0x00 0x21c0500 0x0 0x100>;