drm/xe/irq: Rename bits used with all engines

Two bit fields have similar functionality across the interrupt vectors
but are named "RENDER". Rename them to follow the bspec more closely and
clear any confusion when using them for other engines.

Bspec: 62353, 62354, 62355, 62346, 62345, 63341
Suggested-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20251016-xe3p-v3-19-3dd173a3097a@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

diff --git a/drivers/gpu/drm/xe/regs/xe_irq_regs.h b/drivers/gpu/drm/xe/regs/xe_irq_regs.h
index 7c2a3a1..f611772 100644 (file)
--- a/drivers/gpu/drm/xe/regs/xe_irq_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_irq_regs.h
@@ -80,9 +80,9 @@
 #define   GT_WAIT_SEMAPHORE_INTERRUPT          REG_BIT(11)
 #define   GT_CONTEXT_SWITCH_INTERRUPT          REG_BIT(8)
 #define   GSC_ER_COMPLETE                      REG_BIT(5)
-#define   GT_RENDER_PIPECTL_NOTIFY_INTERRUPT   REG_BIT(4)
+#define   GT_FLUSH_COMPLETE_INTERRUPT  REG_BIT(4)
 #define   GT_CS_MASTER_ERROR_INTERRUPT         REG_BIT(3)
-#define   GT_RENDER_USER_INTERRUPT             REG_BIT(0)
+#define   GT_MI_USER_INTERRUPT                 REG_BIT(0)
 
 /* irqs for OTHER_KCR_INSTANCE */
 #define   KCR_PXP_STATE_TERMINATED_INTERRUPT           REG_BIT(1)

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 073ecd2..6a9e2a4 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -904,7 +904,7 @@ void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec)
        if (hwe->irq_handler)
                hwe->irq_handler(hwe, intr_vec);
 
-       if (intr_vec & GT_RENDER_USER_INTERRUPT)
+       if (intr_vec & GT_MI_USER_INTERRUPT)
                xe_hw_fence_irq_run(hwe->fence_irq);
 }
 

diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 142f422..2108c86 100644 (file)
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -147,10 +147,10 @@ void xe_irq_enable_hwe(struct xe_gt *gt)
                return;
 
        if (xe_device_uc_enabled(xe)) {
-               common_mask = GT_RENDER_USER_INTERRUPT |
-                             GT_RENDER_PIPECTL_NOTIFY_INTERRUPT;
+               common_mask = GT_MI_USER_INTERRUPT |
+                             GT_FLUSH_COMPLETE_INTERRUPT;
        } else {
-               common_mask = GT_RENDER_USER_INTERRUPT |
+               common_mask = GT_MI_USER_INTERRUPT |
                              GT_CS_MASTER_ERROR_INTERRUPT |
                              GT_CONTEXT_SWITCH_INTERRUPT |
                              GT_WAIT_SEMAPHORE_INTERRUPT;

diff --git a/drivers/gpu/drm/xe/xe_memirq.c b/drivers/gpu/drm/xe/xe_memirq.c
index 2ef9d9a..b0c7ce0 100644 (file)
--- a/drivers/gpu/drm/xe/xe_memirq.c
+++ b/drivers/gpu/drm/xe/xe_memirq.c
@@ -434,8 +434,8 @@ static void memirq_dispatch_engine(struct xe_memirq *memirq, struct iosys_map *s
 {
        memirq_debug(memirq, "STATUS %s %*ph\n", hwe->name, 16, status->vaddr);
 
-       if (memirq_received(memirq, status, ilog2(GT_RENDER_USER_INTERRUPT), hwe->name))
-               xe_hw_engine_handle_irq(hwe, GT_RENDER_USER_INTERRUPT);
+       if (memirq_received(memirq, status, ilog2(GT_MI_USER_INTERRUPT), hwe->name))
+               xe_hw_engine_handle_irq(hwe, GT_MI_USER_INTERRUPT);
 }
 
 static void memirq_dispatch_guc(struct xe_memirq *memirq, struct iosys_map *status,