EMC clock is always-on and can't be zero. Check whether clk_round_rate()
returns zero rate and error out if it does. It can return zero if clock
tree isn't initialized properly.
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
return err;
rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
- if (rate < 0) {
+ if (rate <= 0) {
dev_err(&pdev->dev, "Failed to round clock rate: %ld\n", rate);
- return rate;
+ return rate ?: -EINVAL;
}
tegra->max_freq = rate / KHZ;