drm/i915: Split TGL combo PHY buf trans per output type

Make the mess inside the buf trans funcs a bit more manageable by
splitting along the lines of output type.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200929233449.32323-9-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 0d0ebd3..f99575a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1157,51 +1157,66 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, int type, int rate,
 }
 
 static const struct cnl_ddi_buf_trans *
-tgl_get_combo_buf_trans(struct intel_encoder *encoder, int type, int rate,
-                       int *n_entries)
+tgl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, int type, int rate,
+                            int *n_entries)
 {
-       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-
-       switch (type) {
-       case INTEL_OUTPUT_HDMI:
-               *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_hdmi);
-               return icl_combo_phy_ddi_translations_hdmi;
-       case INTEL_OUTPUT_EDP:
-               if (dev_priv->vbt.edp.hobl) {
-                       struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-
-                       if (!intel_dp->hobl_failed && rate <= 540000) {
-                               /* Same table applies to TGL, RKL and DG1 */
-                               *n_entries = ARRAY_SIZE(tgl_combo_phy_ddi_translations_edp_hbr2_hobl);
-                               return tgl_combo_phy_ddi_translations_edp_hbr2_hobl;
-                       }
-               }
+       *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_hdmi);
+       return icl_combo_phy_ddi_translations_hdmi;
+}
 
-               if (rate > 540000) {
-                       *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr3);
-                       return icl_combo_phy_ddi_translations_edp_hbr3;
-               } else if (dev_priv->vbt.edp.low_vswing) {
-                       *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
-                       return icl_combo_phy_ddi_translations_edp_hbr2;
-               }
-               /* fall through */
-       default:
-               /* All combo DP and eDP ports that do not support low_vswing */
-               if (rate > 270000) {
-                       if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
-                               *n_entries = ARRAY_SIZE(tgl_uy_combo_phy_ddi_translations_dp_hbr2);
-                               return tgl_uy_combo_phy_ddi_translations_dp_hbr2;
-                       }
+static const struct cnl_ddi_buf_trans *
+tgl_get_combo_buf_trans_dp(struct intel_encoder *encoder, int type, int rate,
+                          int *n_entries)
+{
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
+       if (rate > 270000) {
+               if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
+                       *n_entries = ARRAY_SIZE(tgl_uy_combo_phy_ddi_translations_dp_hbr2);
+                       return tgl_uy_combo_phy_ddi_translations_dp_hbr2;
+               } else {
                        *n_entries = ARRAY_SIZE(tgl_combo_phy_ddi_translations_dp_hbr2);
                        return tgl_combo_phy_ddi_translations_dp_hbr2;
                }
-
+       } else {
                *n_entries = ARRAY_SIZE(tgl_combo_phy_ddi_translations_dp_hbr);
                return tgl_combo_phy_ddi_translations_dp_hbr;
        }
 }
 
+static const struct cnl_ddi_buf_trans *
+tgl_get_combo_buf_trans_edp(struct intel_encoder *encoder, int type, int rate,
+                           int *n_entries)
+{
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+
+       if (rate > 540000) {
+               *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr3);
+               return icl_combo_phy_ddi_translations_edp_hbr3;
+       } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) {
+               *n_entries = ARRAY_SIZE(tgl_combo_phy_ddi_translations_edp_hbr2_hobl);
+               return tgl_combo_phy_ddi_translations_edp_hbr2_hobl;
+       } else if (dev_priv->vbt.edp.low_vswing) {
+               *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_edp_hbr2);
+               return icl_combo_phy_ddi_translations_edp_hbr2;
+       }
+
+       return tgl_get_combo_buf_trans_dp(encoder, type, rate, n_entries);
+}
+
+static const struct cnl_ddi_buf_trans *
+tgl_get_combo_buf_trans(struct intel_encoder *encoder, int type, int rate,
+                       int *n_entries)
+{
+       if (type == INTEL_OUTPUT_HDMI)
+               return tgl_get_combo_buf_trans_hdmi(encoder, type, rate, n_entries);
+       else if (type == INTEL_OUTPUT_EDP)
+               return tgl_get_combo_buf_trans_edp(encoder, type, rate, n_entries);
+       else
+               return tgl_get_combo_buf_trans_dp(encoder, type, rate, n_entries);
+}
+
 static const struct tgl_dkl_phy_ddi_buf_trans *
 tgl_get_dkl_buf_trans(struct intel_encoder *encoder, int type, int rate,
                      int *n_entries)