drm/amd/display: Expand to higher link rates

[WHY & HOW]
To support higher link rates that sink allows, we need to make
sure driver is ready and perform correct link-training sequence.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
index 107b2ce..8f57b34 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
@@ -209,6 +209,9 @@ static enum dc_link_rate linkRateInKHzToLinkRateMultiplier(uint32_t link_rate_in
        case 8100000:
                link_rate = LINK_RATE_HIGH3;    // Rate_9 (HBR3)- 8.10 Gbps/Lane
                break;
+       case 10000000:
+               link_rate = LINK_RATE_UHBR10;   // UHBR10 - 10.0 Gbps/Lane
+               break;
        default:
                link_rate = LINK_RATE_UNKNOWN;
                break;