drm/amd/display: Add delay before logging clks from hw
authorEthan Bitnun <etbitnun@amd.com>
Fri, 26 Jan 2024 16:24:52 +0000 (11:24 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 7 Feb 2024 17:26:23 +0000 (12:26 -0500)
Add a small delay before reading clks from hw, to ensure correct values
are used for logging.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Ethan Bitnun <etbitnun@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

index 8fa0aae..e64e45e 100644 (file)
@@ -509,6 +509,8 @@ static void dcn32_auto_dpm_test_log(
                }
        }
 
+       msleep(5);
+
        mall_ss_size_bytes = context->bw_ctx.bw.dcn.mall_ss_size_bytes;
 
     dispclk_khz_reg    = REG_READ(CLK1_CLK0_CURRENT_CNT); // DISPCLK