Merge v6.11-rc5 into drm-next

amdgpu pr conconflicts due to patches cherry-picked to -fixes, I might
as well catch up with a backmerge and handle them all. Plus both misc
and intel maintainers asked for a backmerge anyway.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --cc MAINTAINERS
Simple merge

diff --cc drivers/gpu/drm/i915/display/intel_dp_hdcp.c
Simple merge

diff --cc drivers/gpu/drm/rockchip/inno_hdmi.c
Simple merge

diff --cc drivers/gpu/drm/tests/drm_gem_shmem_test.c
Simple merge

diff --cc drivers/gpu/drm/v3d/v3d_sched.c
Simple merge

diff --cc drivers/gpu/drm/xe/display/xe_display.c
index 0e4adde,49de4e4..1188ab8
--- 1/drivers/gpu/drm/xe/display/xe_display.c
--- 2/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@@ -287,9 -283,29 +287,30 @@@ static bool suspend_to_idle(void
        return false;
  }
  
+ static void xe_display_flush_cleanup_work(struct xe_device *xe)
+ {
+       struct intel_crtc *crtc;
+ 
+       for_each_intel_crtc(&xe->drm, crtc) {
+               struct drm_crtc_commit *commit;
+ 
+               spin_lock(&crtc->base.commit_lock);
+               commit = list_first_entry_or_null(&crtc->base.commit_list,
+                                                 struct drm_crtc_commit, commit_entry);
+               if (commit)
+                       drm_crtc_commit_get(commit);
+               spin_unlock(&crtc->base.commit_lock);
+ 
+               if (commit) {
+                       wait_for_completion(&commit->cleanup_done);
+                       drm_crtc_commit_put(commit);
+               }
+       }
+ }
+ 
  void xe_display_pm_suspend(struct xe_device *xe, bool runtime)
  {
 +      struct intel_display *display = &xe->display;
        bool s2idle = suspend_to_idle();
        if (!xe->info.enable_display)
                return;

diff --cc drivers/gpu/drm/xe/regs/xe_gt_regs.h
Simple merge

diff --cc drivers/gpu/drm/xe/xe_bo.c
Simple merge

diff --cc drivers/gpu/drm/xe/xe_exec_queue.c
Simple merge

diff --cc drivers/gpu/drm/xe/xe_exec_queue_types.h
Simple merge

diff --cc drivers/gpu/drm/xe/xe_gt.c
index 58895ed,b9bcbbe..282b5dc
--- 1/drivers/gpu/drm/xe/xe_gt.c
--- 2/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@@ -9,9 -9,10 +9,11 @@@
  
  #include <drm/drm_managed.h>
  #include <drm/xe_drm.h>
 +
  #include <generated/xe_wa_oob.h>
  
+ #include <generated/xe_wa_oob.h>
+ 
  #include "instructions/xe_gfxpipe_commands.h"
  #include "instructions/xe_mi_commands.h"
  #include "regs/xe_gt_regs.h"

diff --cc drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
Simple merge

diff --cc drivers/gpu/drm/xe/xe_guc_submit.c
Simple merge

diff --cc drivers/gpu/drm/xe/xe_mmio.c
index bdcc728,aa68cac..f5bdb54
--- 1/drivers/gpu/drm/xe/xe_mmio.c
--- 2/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@@ -30,49 -30,25 +30,50 @@@ static void tiles_fini(void *arg
        int id;
  
        for_each_tile(tile, xe, id)
-               tile->mmio.regs = NULL;
+               if (tile != xe_device_get_root_tile(xe))
+                       tile->mmio.regs = NULL;
  }
  
 -int xe_mmio_probe_tiles(struct xe_device *xe)
 +/*
 + * On multi-tile devices, partition the BAR space for MMIO on each tile,
 + * possibly accounting for register override on the number of tiles available.
 + * Resulting memory layout is like below:
 + *
 + * .----------------------. <- tile_count * tile_mmio_size
 + * |         ....         |
 + * |----------------------| <- 2 * tile_mmio_size
 + * |   tile1->mmio.regs   |
 + * |----------------------| <- 1 * tile_mmio_size
 + * |   tile0->mmio.regs   |
 + * '----------------------' <- 0MB
 + */
 +static void mmio_multi_tile_setup(struct xe_device *xe, size_t tile_mmio_size)
  {
 -      size_t tile_mmio_size = SZ_16M, tile_mmio_ext_size = xe->info.tile_mmio_ext_size;
 -      u8 id, tile_count = xe->info.tile_count;
 -      struct xe_gt *gt = xe_root_mmio_gt(xe);
        struct xe_tile *tile;
        void __iomem *regs;
 -      u32 mtcfg;
 +      u8 id;
  
 -      if (tile_count == 1)
 -              goto add_mmio_ext;
 +      /*
 +       * Nothing to be done as tile 0 has already been setup earlier with the
 +       * entire BAR mapped - see xe_mmio_init()
 +       */
 +      if (xe->info.tile_count == 1)
 +              return;
  
 +      /* Possibly override number of tile based on configuration register */
        if (!xe->info.skip_mtcfg) {
 +              struct xe_gt *gt = xe_root_mmio_gt(xe);
 +              u8 tile_count;
 +              u32 mtcfg;
 +
 +              /*
 +               * Although the per-tile mmio regs are not yet initialized, this
 +               * is fine as it's going to the root gt, that's guaranteed to be
 +               * initialized earlier in xe_mmio_init()
 +               */
                mtcfg = xe_mmio_read64_2x32(gt, XEHP_MTCFG_ADDR);
                tile_count = REG_FIELD_GET(TILE_COUNT, mtcfg) + 1;
 +
                if (tile_count < xe->info.tile_count) {
                        drm_info(&xe->drm, "tile_count: %d, reduced_tile_count %d\n",
                                        xe->info.tile_count, tile_count);

diff --cc drivers/gpu/drm/xe/xe_pm.c
Simple merge

diff --cc drivers/gpu/drm/xe/xe_preempt_fence.c
Simple merge

diff --cc drivers/gpu/drm/xe/xe_sync.c
Simple merge

diff --cc drivers/gpu/drm/xe/xe_trace.h
Simple merge

diff --cc drivers/gpu/drm/xe/xe_vm.c
index b715883,c7561a5..dab2a3b
--- 1/drivers/gpu/drm/xe/xe_vm.c
--- 2/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@@ -1673,8 -1601,7 +1673,9 @@@ static void vm_destroy_work_func(struc
                XE_WARN_ON(vm->pt_root[id]);
  
        trace_xe_vm_free(vm);
+ 
 +      ttm_lru_bulk_move_fini(&xe->ttm, &vm->lru_bulk_move);
 +
        if (vm->xef)
                xe_file_put(vm->xef);
  

diff --cc drivers/gpu/drm/xe/xe_wa.c
index 564e32e,e648265..5b9e5a1
--- 1/drivers/gpu/drm/xe/xe_wa.c
--- 2/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@@ -542,17 -542,21 +542,31 @@@ static const struct xe_rtp_entry_sr eng
          XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
          XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
        },
+       { XE_RTP_NAME("14021821874"),
+         XE_RTP_RULES(GRAPHICS_VERSION(2001), FUNC(xe_rtp_match_first_render_or_compute)),
+         XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
+       },
+ 
+       /* Xe2_LPM */
+ 
+       { XE_RTP_NAME("16021639441"),
+         XE_RTP_RULES(MEDIA_VERSION(2000)),
+         XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),
+                            GHWSP_CSB_REPORT_DIS |
+                            PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS,
+                            XE_RTP_ACTION_FLAG(ENGINE_BASE)))
+       },
  
 +      /* Xe2_LPM */
 +
 +      { XE_RTP_NAME("16021639441"),
 +        XE_RTP_RULES(MEDIA_VERSION(2000)),
 +        XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),
 +                           GHWSP_CSB_REPORT_DIS |
 +                           PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS,
 +                           XE_RTP_ACTION_FLAG(ENGINE_BASE)))
 +      },
 +
        /* Xe2_HPM */
  
        { XE_RTP_NAME("16021639441"),

diff --cc kernel/panic.c
Simple merge

diff --cc kernel/printk/printk.c
Simple merge