octeontx2-af: Sync NIX and NPA contexts from NDC to LLC/DRAM

Octeontx2 hardware uses Near Data Cache(NDC) block to cache
contexts in it so that access to LLC/DRAM can be avoided.
It is recommended in HRM to sync the NDC contents before
releasing/resetting LF resources. Hence implement NDC_SYNC
mailbox and sync contexts during driver teardown.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 4a77f6f..ebf84c2 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -139,6 +139,7 @@ M(MSIX_OFFSET,              0x005, msix_offset, msg_req, msix_offset_rsp)   \
 M(VF_FLR,              0x006, vf_flr, msg_req, msg_rsp)                \
 M(PTP_OP,              0x007, ptp_op, ptp_req, ptp_rsp)                \
 M(GET_HW_CAP,          0x008, get_hw_cap, msg_req, get_hw_cap_rsp)     \
+M(NDC_SYNC_OP,         0x009, ndc_sync_op, ndc_sync_op, msg_rsp)       \
 M(LMTST_TBL_SETUP,     0x00a, lmtst_tbl_setup, lmtst_tbl_setup_req,    \
                                msg_rsp)                                \
 M(SET_VF_PERM,         0x00b, set_vf_perm, set_vf_perm, msg_rsp)       \
@@ -1716,6 +1717,13 @@ struct lmtst_tbl_setup_req {
        u64 rsvd[4];
 };
 
+struct ndc_sync_op {
+       struct mbox_msghdr hdr;
+       u8 nix_lf_tx_sync;
+       u8 nix_lf_rx_sync;
+       u8 npa_lf_sync;
+};
+
 /* CPT mailbox error codes
  * Range 901 - 1000.
  */

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
index ff78251..5a4f774 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c
@@ -2014,6 +2014,13 @@ int rvu_mbox_handler_vf_flr(struct rvu *rvu, struct msg_req *req,
        return 0;
 }
 
+int rvu_ndc_sync(struct rvu *rvu, int lfblkaddr, int lfidx, u64 lfoffset)
+{
+       /* Sync cached info for this LF in NDC to LLC/DRAM */
+       rvu_write64(rvu, lfblkaddr, lfoffset, BIT_ULL(12) | lfidx);
+       return rvu_poll_reg(rvu, lfblkaddr, lfoffset, BIT_ULL(12), true);
+}
+
 int rvu_mbox_handler_get_hw_cap(struct rvu *rvu, struct msg_req *req,
                                struct get_hw_cap_rsp *rsp)
 {
@@ -2068,6 +2075,65 @@ int rvu_mbox_handler_set_vf_perm(struct rvu *rvu, struct set_vf_perm *req,
        return 0;
 }
 
+int rvu_mbox_handler_ndc_sync_op(struct rvu *rvu,
+                                struct ndc_sync_op *req,
+                                struct msg_rsp *rsp)
+{
+       struct rvu_hwinfo *hw = rvu->hw;
+       u16 pcifunc = req->hdr.pcifunc;
+       int err, lfidx, lfblkaddr;
+
+       if (req->npa_lf_sync) {
+               /* Get NPA LF data */
+               lfblkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);
+               if (lfblkaddr < 0)
+                       return NPA_AF_ERR_AF_LF_INVALID;
+
+               lfidx = rvu_get_lf(rvu, &hw->block[lfblkaddr], pcifunc, 0);
+               if (lfidx < 0)
+                       return NPA_AF_ERR_AF_LF_INVALID;
+
+               /* Sync NPA NDC */
+               err = rvu_ndc_sync(rvu, lfblkaddr,
+                                  lfidx, NPA_AF_NDC_SYNC);
+               if (err)
+                       dev_err(rvu->dev,
+                               "NDC-NPA sync failed for LF %u\n", lfidx);
+       }
+
+       if (!req->nix_lf_tx_sync && !req->nix_lf_rx_sync)
+               return 0;
+
+       /* Get NIX LF data */
+       lfblkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
+       if (lfblkaddr < 0)
+               return NIX_AF_ERR_AF_LF_INVALID;
+
+       lfidx = rvu_get_lf(rvu, &hw->block[lfblkaddr], pcifunc, 0);
+       if (lfidx < 0)
+               return NIX_AF_ERR_AF_LF_INVALID;
+
+       if (req->nix_lf_tx_sync) {
+               /* Sync NIX TX NDC */
+               err = rvu_ndc_sync(rvu, lfblkaddr,
+                                  lfidx, NIX_AF_NDC_TX_SYNC);
+               if (err)
+                       dev_err(rvu->dev,
+                               "NDC-NIX-TX sync fail for LF %u\n", lfidx);
+       }
+
+       if (req->nix_lf_rx_sync) {
+               /* Sync NIX RX NDC */
+               err = rvu_ndc_sync(rvu, lfblkaddr,
+                                  lfidx, NIX_AF_NDC_RX_SYNC);
+               if (err)
+                       dev_err(rvu->dev,
+                               "NDC-NIX-RX sync failed for LF %u\n", lfidx);
+       }
+
+       return 0;
+}
+
 static int rvu_process_mbox_msg(struct otx2_mbox *mbox, int devid,
                                struct mbox_msghdr *req)
 {

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 3063a84..03ee93f 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -800,6 +800,7 @@ int rvu_lf_reset(struct rvu *rvu, struct rvu_block *block, int lf);
 int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc);
 int rvu_poll_reg(struct rvu *rvu, u64 block, u64 offset, u64 mask, bool zero);
 int rvu_get_num_lbk_chans(void);
+int rvu_ndc_sync(struct rvu *rvu, int lfblkid, int lfidx, u64 lfoffset);
 int rvu_get_blkaddr_from_slot(struct rvu *rvu, int blktype, u16 pcifunc,
                              u16 global_slot, u16 *slot_in_block);
 

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 00af888..4dbbaa7 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -2497,9 +2497,7 @@ static int nix_txschq_free(struct rvu *rvu, u16 pcifunc)
        }
        mutex_unlock(&rvu->rsrc_lock);
 
-       /* Sync cached info for this LF in NDC-TX to LLC/DRAM */
-       rvu_write64(rvu, blkaddr, NIX_AF_NDC_TX_SYNC, BIT_ULL(12) | nixlf);
-       err = rvu_poll_reg(rvu, blkaddr, NIX_AF_NDC_TX_SYNC, BIT_ULL(12), true);
+       err = rvu_ndc_sync(rvu, blkaddr, nixlf, NIX_AF_NDC_TX_SYNC);
        if (err)
                dev_err(rvu->dev, "NDC-TX sync failed for NIXLF %d\n", nixlf);
 

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
index 5ec9265..d56be5f 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h
@@ -121,6 +121,7 @@
 #define NPA_AF_LF_RST                   (0x0020)
 #define NPA_AF_GEN_CFG                  (0x0030)
 #define NPA_AF_NDC_CFG                  (0x0040)
+#define NPA_AF_NDC_SYNC                 (0x0050)
 #define NPA_AF_INP_CTL                  (0x00D0)
 #define NPA_AF_ACTIVE_CYCLES_PC         (0x00F0)
 #define NPA_AF_AVG_DELAY                (0x0100)
@@ -239,6 +240,7 @@
 #define NIX_AF_RX_CPTX_INST_ADDR       (0x0310)
 #define NIX_AF_RX_CPTX_INST_QSEL(a)    (0x0320ull | (uint64_t)(a) << 3)
 #define NIX_AF_RX_CPTX_CREDIT(a)       (0x0360ull | (uint64_t)(a) << 3)
+#define NIX_AF_NDC_RX_SYNC             (0x03E0)
 #define NIX_AF_NDC_TX_SYNC             (0x03F0)
 #define NIX_AF_AQ_CFG                  (0x0400)
 #define NIX_AF_AQ_BASE                 (0x0410)

diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
index ff05ea2..5492dea 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
@@ -3245,6 +3245,29 @@ static int otx2_sriov_configure(struct pci_dev *pdev, int numvfs)
                return otx2_sriov_enable(pdev, numvfs);
 }
 
+static void otx2_ndc_sync(struct otx2_nic *pf)
+{
+       struct mbox *mbox = &pf->mbox;
+       struct ndc_sync_op *req;
+
+       mutex_lock(&mbox->lock);
+
+       req = otx2_mbox_alloc_msg_ndc_sync_op(mbox);
+       if (!req) {
+               mutex_unlock(&mbox->lock);
+               return;
+       }
+
+       req->nix_lf_tx_sync = 1;
+       req->nix_lf_rx_sync = 1;
+       req->npa_lf_sync = 1;
+
+       if (!otx2_sync_mbox_msg(mbox))
+               dev_err(pf->dev, "NDC sync operation failed\n");
+
+       mutex_unlock(&mbox->lock);
+}
+
 static void otx2_remove(struct pci_dev *pdev)
 {
        struct net_device *netdev = pci_get_drvdata(pdev);
@@ -3293,6 +3316,7 @@ static void otx2_remove(struct pci_dev *pdev)
        otx2_mcam_flow_del(pf);
        otx2_shutdown_tc(pf);
        otx2_shutdown_qos(pf);
+       otx2_ndc_sync(pf);
        otx2_detach_resources(&pf->mbox);
        if (pf->hw.lmt_info)
                free_percpu(pf->hw.lmt_info);