octeontx2-af: Reset NIXLF's Rx/Tx stats

This patch adds a new mailbox message to reset
a NIXLF's receive and transmit HW stats.

Signed-off-by: Vamsi Attunuru <vamsi.attunuru@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index f2e0743..f8efeaa 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -155,7 +155,8 @@ M(NIX_AQ_ENQ,               0x8002, nix_aq_enq_req, nix_aq_enq_rsp)         \
 M(NIX_HWCTX_DISABLE,   0x8003, hwctx_disable_req, msg_rsp)             \
 M(NIX_TXSCH_ALLOC,     0x8004, nix_txsch_alloc_req, nix_txsch_alloc_rsp) \
 M(NIX_TXSCH_FREE,      0x8005, nix_txsch_free_req, msg_rsp)            \
-M(NIX_TXSCHQ_CFG,      0x8006, nix_txschq_config, msg_rsp)
+M(NIX_TXSCHQ_CFG,      0x8006, nix_txschq_config, msg_rsp)             \
+M(NIX_STATS_RST,       0x8007, msg_req, msg_rsp)
 
 /* Messages initiated by AF (range 0xC00 - 0xDFF) */
 #define MBOX_UP_CGX_MESSAGES                                           \

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 4b15552..f041d0a 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -288,4 +288,6 @@ int rvu_mbox_handler_NIX_TXSCH_FREE(struct rvu *rvu,
 int rvu_mbox_handler_NIX_TXSCHQ_CFG(struct rvu *rvu,
                                    struct nix_txschq_config *req,
                                    struct msg_rsp *rsp);
+int rvu_mbox_handler_NIX_STATS_RST(struct rvu *rvu, struct msg_req *req,
+                                  struct msg_rsp *rsp);
 #endif /* RVU_H */

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 56f242d..62d8913 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -1053,6 +1053,36 @@ static int nix_setup_txschq(struct rvu *rvu, struct nix_hw *nix_hw, int blkaddr)
        return 0;
 }
 
+int rvu_mbox_handler_NIX_STATS_RST(struct rvu *rvu, struct msg_req *req,
+                                  struct msg_rsp *rsp)
+{
+       struct rvu_hwinfo *hw = rvu->hw;
+       u16 pcifunc = req->hdr.pcifunc;
+       int i, nixlf, blkaddr;
+       u64 stats;
+
+       blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);
+       if (blkaddr < 0)
+               return NIX_AF_ERR_AF_LF_INVALID;
+
+       nixlf = rvu_get_lf(rvu, &hw->block[blkaddr], pcifunc, 0);
+       if (nixlf < 0)
+               return NIX_AF_ERR_AF_LF_INVALID;
+
+       /* Get stats count supported by HW */
+       stats = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
+
+       /* Reset tx stats */
+       for (i = 0; i < ((stats >> 24) & 0xFF); i++)
+               rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_STATX(nixlf, i), 0);
+
+       /* Reset rx stats */
+       for (i = 0; i < ((stats >> 32) & 0xFF); i++)
+               rvu_write64(rvu, blkaddr, NIX_AF_LFX_RX_STATX(nixlf, i), 0);
+
+       return 0;
+}
+
 static int nix_calibrate_x2p(struct rvu *rvu, int blkaddr)
 {
        int idx, err;