drm/amd/display: Monitor patch to call blank_stream() before otg off

[Why]
Turning off OTG before DIG is on and backlight is on, might cause:

DIG FIFO underflow.
EDP output unexpected video data. That might violate EDP spec.
EDP spec requires black light should be off before validate
video data is turned off.

Currently garbage issue only occurs in one type of EDP to MIPI converter.

[How]
Add monitor patch to call blank_stream() before disable_crtc().
That will be no impact for current sequence.

If there are more types of EDP panels meeting this issue later,
we might remove this monitor patch and fix the current sequence.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Zhongwei <Zhongwei.Zhang@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index fd6dca7..2bbafd1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -178,6 +178,7 @@ struct dc_panel_patch {
        unsigned int skip_avmute;
        unsigned int mst_start_top_delay;
        unsigned int remove_sink_ext_caps;
+       uint8_t blankstream_before_otg_off;
 };
 
 struct dc_edid_caps {

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
index 3d4b31b..bfc78a4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
@@ -517,6 +517,11 @@ static void dcn31_reset_back_end_for_pipe(
 
        dc->hwss.set_abm_immediate_disable(pipe_ctx);
 
+       if ((!pipe_ctx->stream->dpms_off || pipe_ctx->stream->link->link_status.link_active)
+               && pipe_ctx->stream->sink && pipe_ctx->stream->sink->edid_caps.panel_patch.blankstream_before_otg_off) {
+               dc->hwss.blank_stream(pipe_ctx);
+       }
+
        pipe_ctx->stream_res.tg->funcs->set_dsc_config(
                        pipe_ctx->stream_res.tg,
                        OPTC_DSC_DISABLED, 0, 0);